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Course Overview 0
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Module 1 (Computer Fundamentals ) 6
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DLDA Introduction 05 minLecture2.1
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Binary and Decimal system 21 minLecture2.2
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Octal Number System 18 minLecture2.3
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Hexadecimal Number System 10 minLecture2.4
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COA Introduction 09 minLecture2.5
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[Notes] Computer FundamentalsLecture2.6
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Module 2 (Data Representation and Arithmetic Algorithms) 17
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Floating Point Number Representation in IEEE 754 17 minLecture3.1
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Booth’s Algorithm with Solved Example Part #1 15 minLecture3.2
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Booth’s Algorithm with Solved Example Part #2 10 minLecture3.3
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Booth’s Algorithm with Solved Example Part #3 08 minLecture3.4
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Numerical Data Representation 07 minLecture3.5
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Restoring Division Part #1 18 minLecture3.6
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Restoring Division Part #2 10 minLecture3.7
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Non Restoring Division Part #1 12 minLecture3.8
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Non Restoring Division Part #2 10 minLecture3.9
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RISC Microprocessor 12 minLecture3.10
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BCD Arithmetic 11 minLecture3.11
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How to find 1’s and 2’s Complement 12 minLecture3.12
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Subtraction using 1’s & 2’s Complement 10 minLecture3.13
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Codes 10 minLecture3.14
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Codes Non-Weighted 06 minLecture3.15
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BCD XS-3 and Gray Code 13 minLecture3.16
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[Notes] Data Representation and Arithmetic Algorithm With SumsLecture3.17
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Module 3 (Processor Organization and Architecture) 8
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Full Adder 14 minLecture4.1
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Half Adder 11 minLecture4.2
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Full Subtractor 08 minLecture4.3
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Half Subtractor 07 minLecture4.4
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Full Subtractor Using Half Subtractor 07 minLecture4.5
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Full Adder Using Half Adder 08 minLecture4.6
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Conversion of T to D Flip Flop 05 minLecture4.7
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[Notes] Processor Organization and ArchitectureLecture4.8
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Module 4 (Control Unit Design) 5
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Hardwired Control Unit 08 minLecture5.1
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Microprogrammed Control Unit 08 minLecture5.2
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Hardwired CU vs Micro-programmed CU 10 minLecture5.3
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Wilkes Control 10 minLecture5.4
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[Notes] Control unit designLecture5.5
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Module 5 (Memory Organization) 13
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Memory and its characteristics 09 minLecture6.1
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DRAM ( Dynamic RAM ) 07 minLecture6.2
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SRAM (Static RAM) 08 minLecture6.3
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Cache Memory Full Concept with working 07 minLecture6.4
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Memory Hierarchy and Locality of Reference 13 minLecture6.5
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Memory Interleaving 10 minLecture6.6
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Virtual Memory and Paging concept 10 minLecture6.7
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Memory Segmentation 10 minLecture6.8
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Demand Paging 11 minLecture6.9
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Cache Coherence Single and Multiprocessor 11 minLecture6.10
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Cache Coherence Strategies 09 minLecture6.11
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MESI Write invalidate snoopy protocol 11 minLecture6.12
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[Notes] Memory organizationLecture6.13
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Module 6 (Principles of Advanced Processor and Buses) 15
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Basic Concept of Pipeline 10 minLecture7.1
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Parallel Processing and Applications 13 minLecture7.2
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Flynn’s Classification 10 minLecture7.3
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Amdahl’s law 07 minLecture7.4
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Instruction Level Parallelism (ILP) 08 minLecture7.5
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Superscalar Architecture 10 minLecture7.6
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VLIW 10 minLecture7.7
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Superscalar vs VLIW 05 minLecture7.8
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Out of Order Execution 09 minLecture7.9
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BUS and BUS Arbitration 11 minLecture7.10
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BUS Arbitration Daisy Chaining 08 minLecture7.11
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BUS Arbitration-Polling Method 07 minLecture7.12
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Instruction Cycles and Interrupt Mechanism 07 minLecture7.13
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BUS Arbitration-Independent Request 04 minLecture7.14
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[Notes] Principles of advanced processor and busesLecture7.15
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PDF Notes 1
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(BCNF) Boyce Cod Normal Form with example 10 minLecture8.1
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Viva Questions 6
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Computer FundamentalsLecture9.1
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Data Representation and Arithmetic AlgorithmsLecture9.2
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Processor Organization and ArchitectureLecture9.3
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Control Unit DesignLecture9.4
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Memory OrganizationLecture9.5
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Principles of Advanced Processor and BusesLecture9.6
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Octal Number System
Octal Number System
The octal numeral system, or oct for short, is the base-8 number system, and uses the digits 0 to 7, that is to say 10 represents 8 in decimal and 100 represents 64 in decimal.The octal system has the base of eight as it uses eight digits 0, 1, 2, 3, 4, 5, 6, 7. All these digits from 0 to 7 have the same physical meaning as by decimal symbols, the next digit in the octal number is represented by 10, 11, 12, which are equivalent to decimal digits 8, 9, 10 respectively.
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