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Digital Logic & Computer Organization and Architecture [Module 1]:- Computer Fundamentals 12
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Introduction – Digital Logic Design 05 minLecture1.1
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Introduction – Computer Organization 09 minLecture1.2
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Von Neumann Architecture 13 minLecture1.3
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Binary Number System 11 minLecture1.4
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Number System 07 minLecture1.5
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Octal Number System 09 minLecture1.6
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Hexadecimal Number System 07 minLecture1.7
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Logic Gates – 1 12 minLecture1.8
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Logic Gates – 2 08 minLecture1.9
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Universal Gates 13 minLecture1.10
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Excess – 3 06 minLecture1.11
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Gray Code 07 minLecture1.12
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Digital Logic & Computer Organization and Architecture [Module 2]:- Data Representation and Arithmetic Algorithms 12
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Arithmetic Operations in Binary 08 minLecture2.1
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Arithmetic Operations using 9s and 10s 10 minLecture2.2
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Arithmetic Operations using 1_s and 2_s compliment 13 minLecture2.3
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Binary Numeric Data RepresentationLecture2.4
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Floating Point Number Representation in IEEE 754 17 minLecture2.5
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Booth’s Algorithm with Solved Example Part #1 15 minLecture2.6
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Booth’s Algorithm with Solved Example Part #2 10 minLecture2.7
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Booth’s Algorithm with Solved Example Part #3 08 minLecture2.8
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Restoring Division Part #1 18 minLecture2.9
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Restoring Division Part #2 10 minLecture2.10
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Non Restoring Division Part #1 12 minLecture2.11
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Non Restoring Division Part #2 10 minLecture2.12
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Digital Logic & Computer Organization and Architecture [Module 3]:- Processor Organization and Architecture 8
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Half and Full Adder 13 minLecture3.1
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Multiplexer and demultiplexer 07 minLecture3.2
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S-R Flip Flop 08 minLecture3.3
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J-k Flip Flop 05 minLecture3.4
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D Flip Flop & T Flip Flop 06 minLecture3.5
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Addressing Modes – Part 01 12 minLecture3.6
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Addressing Modes – Part 02 13 minLecture3.7
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Instruction Cycles and Interrupt Mechanism 07 minLecture3.8
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Digital Logic & Computer Organization and Architecture [Module 4]:- Control Unit Design 3
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Hardwired Control Unit 08 minLecture4.1
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Microprogrammed Control Unit 08 minLecture4.2
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Hardwired CU vs Micro-programmed CU 10 minLecture4.3
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Digital Logic & Computer Organization and Architecture [Module 5]:- Memory Organization 9
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Memory and its characteristics 09 minLecture5.1
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DRAM ( Dynamic RAM ) 07 minLecture5.2
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SRAM (Static RAM) 08 minLecture5.3
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Memory Hierarchy and Locality of Reference 13 minLecture5.4
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Cache Memory Full Concept with working 07 minLecture5.5
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Cache Coherence Single and Multiprocessor 11 minLecture5.6
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Cache Coherence Strategies 09 minLecture5.7
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MESI protocol 11 minLecture5.8
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Interleaved Memory 10 minLecture5.9
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Digital Logic & Computer Organization and Architecture [Module 6]:- Principles of Advanced Processor and Buses 9
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Pipelining Hazards 08 minLecture6.1
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Branch Prediction Logic 06 minLecture6.2
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Amdahl’s law 07 minLecture6.3
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Flynn’s Classification 10 minLecture6.4
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BUS and BUS Arbitration 11 minLecture6.5
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Daisy Chaining 08 minLecture6.6
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Polling Method 07 minLecture6.7
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BUS Arbitration-Independent Request 04 minLecture6.8
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Parallel Processing and Applications 13 minLecture6.9
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Digital Logic & Computer Organization and Architecture [Notes]:- 6
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Computer FundamentalsLecture7.1
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Data Representation and Arithmetic Algorithm With SumsLecture7.2
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Processor Organization and Architecture.Lecture7.3
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Control unit designLecture7.4
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Memory organizationLecture7.5
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Principles of advanced processor and busesLecture7.6
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Digital Logic & Computer Organization and Architecture [Viva Question]:- 6
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Computer FundamentalsLecture8.1
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Processor Organization and ArchitectureLecture8.2
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Data Representation and Arithmetic AlgorithmsLecture8.3
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Control Unit DesignLecture8.4
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Memory OrganizationLecture8.5
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Principles of Advanced Processor and BusesLecture8.6
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Digital Logic & Computer Organization and Architecture [ IMPs ]:- 6
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Computer FundamentalsLecture9.1
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Processor Organization and ArchitectureLecture9.2
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Data Representation and Arithmetic AlgorithmsLecture9.3
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Control Unit DesignLecture9.4
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Memory OrganizationLecture9.5
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Principles of Advanced Processor and BusesLecture9.6
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Excess – 3