1. The advantages over the vacuum triode for a junction transistor is_________
a) high power consumption
b) high efficiency
c) large size
d) less doping
Answer: b
Explanation: A junction transistor is an analogous to a vacuum triode. The main difference between them is that a transistor is a current device while a vacuum triode is a voltage device. The advantages of a transistor over a vacuum triode are long life, high efficiency, light weight, smaller in size, less power consumption.

2. What is the left hand section of a junction transistor called?
a) base
b) collector
c) emitter
d) depletion region
Answer: c
Explanation: The main function of this section is to supply majority charge carriers to the base. Hence it is more heavily doped in comparison to other regions. This forms the left hand section of the transistor.

3. In an NPN transistor, the arrow is pointed towards_________
a) the collector
b) the base
c) depends on the configuration
d) the emitter
Answer: d
Explanation: As regards to the symbols, the arrow head is always at the emitter. The direction indicates the conventional direction of current flow. In case of PNP transistor, it is from base to emitter.

4. Which of the following is true in construction of a transistor?
a) the collector dissipates lesser power
b) the emitter supplies minority carriers
c) the collector is made physically larger than the emitter region
d) the collector collects minority charge carriers
Answer: c
Explanation: In most of the transistors, the collector is made larger than emitter region. This is due to the fact that collector has to dissipate much greater power. The collector and emitter cannot be interchanged.

5. In the operation of an NPN transistor, the electrons cross which region?
a) emitter region
b) the region where there is high depletion
c) the region where there is low depletion
d) P type base region
Answer: d
Explanation: The electrons in the emitter region are repelled by the negative terminal of the battery towards the emitter junction. The potential barrier at the junction is reduced due to forward bias and base region is very thin and lightly doped, electrons cross the P type base region.

6. Which of the following are true for a PNP transistor?
a) the emitter current is less than the collector current
b) the collector current is less than the emitter current
c) the electrons are majority charge carriers
d) the holes are the minority charge carriers
Answer: b
Explanation: The 2 – 5% of holes is lost in recombination with electrons in the base region. The majority charge carriers are holes for a PNP transistor. Thus the collector current is slightly less than the emitter current.

7. In the saturated region, the transistor acts like a_________
a) poor transistor
b) amplifier
c) open switch
d) closed switch
Answer: d
Explanation: In saturated mode, both emitter and collector are forward biased. The negative of the battery is connected to emitter and similarly the positive terminals of batteries are connected to the base. The transistor now acts like a closed switch.

8. When does the transistor act like an open switch?
a) cut off region
b) inverted region
c) saturated region
d) active region
Answer: a
Explanation: In cut off region, both the junctions are reverse biased. The transistor has practically zero current because the emitter does not emit charge carriers to the base. So, the transistor acts as open switch.

9. If the emitter-base junction is forward biased and the collector-base junction is reverse biased, what will be the region of operation for a transistor?
a) cut off region
b) saturated region
c) inverted region
d) active region
Answer: d
Explanation: When the emitter-base junction is forward biased and the collector-base junction is reverse biased, the transistor is used for amplification. A battery is connected to collector base circuit. The positive terminal is connected to the collector while the negative is connected to the base.

10. The transfer of a signal in a transistor is_________
a) low to high resistance
b) high to low resistance
c) collector to base junction
d) emitter to base junction
Answer: a
Explanation: A forward biased emitter base junction has a low resistance path. A reversed biased junction has a high resistance path. The weak signal is introduced in a low resistance circuit and the output is taken from the high resistance circuit.

11. The AC current gain in a common base configuration is_________
a) -∆I_C/∆I_E
b) ∆I_C/∆I_E
c) ∆I_E/∆I_C
d) -∆I_E/∆I_C
Answer: a
Explanation: The AC current gain is denoted by α_ac. The ratio of change in collector current to the change in emitter current at constant collector base voltage is defined as current amplification factor.

12. The value of αac for all practical purposes, for commercial transistors range from_________
a) 0.5-0.6
b) 0.7-0.77
c) 0.8-0.88
d) 0.9-0.99
Answer: d
Explanation: For all practical purposes, αac=αdc=α and practical values in commercial transistors range from 0.9-0.99. It is the measure of the quality of a transistor. Higher is the value of α, better is the transistor in the sense that collector current approaches the emitter current.

13. A transistor has an I_C of 100mA and I_B of 0.5mA. What is the value of αdc?
a) 0.787
b) 0.995
c) 0.543
d) 0.659
Answer: b
Explanation: Emitter current I_E=I_C+I_B =100+0.5=100.5mA
α_dc=I_C/I_E=100/100.5=0.995.

14. In CB configuration, the value of α=0.98A. A voltage drop of 4.9V is obtained across the resistor of 5KΩ when connected in collector circuit. Find the base current.
a) 0.01mA
b) 0.07mA
c) 0.02mA
d) 0.05mA
Answer: c
Explanation: Here, I_C=4.9/5K=0.98mA
α = I_C/I_E .So,
I_E=I_C/α=0.98/0.98=1mA.
I_B=I_E-I_C=1-0.98=0.02Ma.

15. The emitter current I_E in a transistor is 3mA. If the leakage current I_CBO is 5µA and α=0.98, calculate the collector and base current.
a) 3.64mA and 35µA
b) 2.945mA and 55µA
c) 3.64mA and 33µA
d) 5.89mA and 65µA
Answer: b
Explanation: I_C=αI_E + I_CBO
=0.98*3+0.005=2.945mA.
I_E=I_C+I_B . So, I_B=3-2.495=0.055mA=55µA.

16. Determine the value of emitter current and collector current of a transistor having α=0.98 and collector to base leakage current I_CBO=4µA. The base current is 50µA.
a) 1.5mA
b) 3.7mA
c) 2.7mA
d) 4.5mA
Answer: c
Explanation: Given, I_B=50µA=0.05mA
I_CBO=4µA=0.004Ma
I_C=α/(1- α)I_B+1/(1- α)I_CBO=2.45+0.2=2.65Ma
I_E=I_C+I_B=2.65+0.05=2.7mA.

17. The negative sign in the formula of amplification factor indicates_________
a) that I_E flows into transistor while I_C flows out it
b) that I_C flows into transistor while I_E flows out it
c) that I_B flows into transistor while I_C flows out it
d) that I_C flows into transistor while I_B flows out it
Answer: a
Explanation: When no signal is applied, the ratio of collector current to emitter current is called dc alpha, α_dc of a transistor. α_dc=-I_C/I_E. It is the measure of the quality of a transistor. Higher is the value of α, better is the transistor in the sense that collector current approaches the emitter current.

18. The relation between α and β is _________
a) β=α/(1-α)
b) α= β/(1+β)
c) β=α/(1+α)
d) α= β/(1- β)
Answer: b
Explanation: β is an ac base amplification factor. α is called as current amplification factor. The relation of I_C and I_B change as I_C= βI_B+ (1+ β)I_CBO.

19. A transistor has an I_E of 0.9mA and amplification factor of 0.98. What will be the I_C?
a) 0.745mA
b) 0.564mA
c) 0.236mA
d) 0.882mA
Answer: d
Explanation: Given, I_E = 0.9mA, α=0.98
We know, α= I_C/I_E
So, I_C=0.98*0.9=0.882mA.

20. The collector current is 2.945A and α=0.98. The leakage current is 2µA. What is the emitter current and base current?
a) 3mA and 55µA
b) 2.945mA and 55µA
c) 3.64mA and 33µA
d) 5.89mA and 65µA
Answer: a
Explanation: (I_C – I_CBO)/α=I_E
= (2.945-0.002)/0.98=3mA.
I_E=I_C+I_B . So, I_B=3-2.495=0.055mA=55µA.

21. The base current amplification factor β is given by_________
a) I_C/I_B
b) I_B/I_C
c) I_E/I_B
d) I_B/I_E
Answer: a
Explanation: The current amplification factor (β) is given by I_C//I_B. When no signal is applied, then the ratio of collector current to the base current is called current amplification factor of a transistor.

22. In an NPN silicon transistor, α=0.995, I_E=10mA and leakage current I_CBO=0.5µA. Determine I_CEO.
a) 10µA
b) 100µA
c) 90µA
d) 500µA
Answer: b
Explanation: I_C=α I_E +I_CBO =0.995*10mA+0.5µA=9.9505mA.
I_B=I_E-I_C=10-9.9505=0.0495mA. β=α/(1-α)=0.995/(1-0.995)=199
I_CEO=9.9505-199*0.0495=0.1mA==100µA.

23. A germanium transistor with α=0.98 gives a reverse saturation current I_CBO=10µA in a CB configuration. When it is used in CE configuration with a base current of 0.22µA, calculate the collector current.
a) 0.9867mA
b) 0.7654mA
c) 0.51078mA
d) 0.23456mA
Answer: c
Explanation: Given, I_CBO=10µA, α=0.98 and I_B =0.22µA. I_C=α/ (1-α) I_B+ 1/(1-α) I_CBO
0.01078+0.5=0.51078mA.

24. In CE configuration, if the voltage drop across 5kΩ resistor connected in the collector circuit is 5V. Find the value of I_B when β=50.
a) 0.01mA
b) 0.25mA
c) 0.03mA
d) 0.02mA
Answer: d
Explanation: I_C=V across R_L/R_L=5V/5KΩ=1mA.
I_B=I_C/β=1/50=0.02mA.

25. A transistor is connected in CE configuration. Collector supply voltage V_cc=10V, R_L=800Ω, voltage drop across R_L=0.8V, α=0.96. What is base current?
a) 41.97µA
b) 56.78µA
c) 67.67µA
d) 78.54µA
Answer: a
Explanation: Here, I_C=0.8/800=1mA
β= α/ (1-α)=0.96/1-0.96=24.
Now, I_B=I_C/ β=1/24=41.67µA.

26. The collector supply voltage for a CE configured transistor is 10V. The resistance R_L=800Ω. The voltage drop across R_L is 0.8V. Find the value of collector emitter voltage.
a) 3.7V
b) 9.2V
c) 6.5V
d) 9.8V
Answer: b
Explanation: Here, I_C=0.8/800=1mA.
We know, V_CE=V_CC-I_CR_L
=10-0.8=9.2V.

27. The relation between α and β is_________
a) β = α/ (1-α)
b) α = β/(1+β)
c) β = α/ (1+α)
d) α = β/(1- β)
Answer: b
Explanation: β is an ac base amplification factor. α is called as current amplification factor. The relation of I_C and I_B change as I_C= βI_B+ (1+ β) I_CBO.

28. In I_CEO, wt does the subscript ‘CEO’ mean?
a) collector to base emitter open
b) emitter to base collector open
c) collector to emitter base open
d) emitter to collector base open
Answer: c
Explanation: The subscript ‘CEO’ means that it is collector to emitter base open. It is called as the leakage current. It occurs in a reverse bias in PNP transistor. The total current can be calculated by I_C=βI_B+I_C.

29. When the signal is applied, the ratio of change of collector current to the ratio of change of base current is called_________
a) dc current gain
b) base current amplification factor
c) emitter current amplification factor
d) ac current gain
Answer: d
Explanation: The ac current gain is given by β=∆I_C/∆I_B. When the signal is applied, the ratio of change of collector current to the ratio of change of base current is called ac current gain.

30. The range of β is _________
a) 20 to 500
b) 50 to 300
c) 30 to 400
d) 10 to 20
Answer: a
Explanation: Almost in all the transistors, the base current is less than 5% of the emitter current. Due to this fact, it is generally greater than 20. Usually it ranges from 20 to 500. Hence this configuration is frequently used when appreciable current gain as well as voltage gain is required.

31. The input characteristics of a CE transistor is_________

Answer: b
Explanation: A graph of I_B against V_BE is drawn. The curve so obtained is known as input characteristics. The collector emitter voltage (V_CE) is kept constant.

32. The input resistance is given by _________
a) ∆V_CE/∆I_B
b) ∆V_BE/∆I_B
c) ∆V_BE/∆I_C
d) ∆V_BE/∆I_E
Answer: b
Explanation: The ratio of change in base emitter voltage (∆V_BE) to resulting change in base current (∆I_B) at constant collector emitter voltage (V_CE) is defined as input resistance. This is denoted by r_i.

33. Which of the following depicts the output characteristics of a CE transistor?

Answer: d
Explanation: A graph of I_C against V_CE is drawn. The curve so obtained is known as output characteristics. The base current (I_B) is kept constant.

34. The output resistance is given by _________
a) ∆V_CE/∆I_B
b) ∆V_BE/∆I_B
c) ∆V_BE/∆I_C
d) ∆V_CE/∆I_C
Answer: d
Explanation: The ratio of change in collector emitter voltage (∆V_CE) to resulting change in collector current (∆I_C) at constant base current (I_B) is defined as output resistance. This is denoted by r_o.

35. Which of the following cases damage the transistor?
a) when V_CE is increased too far
b) when V_CE is decreased too far
c) when V_BE is increased too far
d) when V_BE is decreased too far
Answer: a
Explanation: When V_CE is increased too far, collector base junction completely breaks down and due to this avalanche breakdown, collector current increases rapidly. This is not shown in the characteristic. In this case, the transistor is damaged.

36. When the collector junction is reverse biased and emitter junction is forward biased, the operating region of the transistor is called_________
a) inverted region
b) active region
c) cut off region
d) cut in region
Answer: b
Explanation: In the active region, for small values of base current, the effect of collector voltage over collector current is small while for large base currents this effect increases. The shape of characteristic here is same as that of CB transistors.

37. The small amount of current which flows even when base current I_B=0 is called_________
a) I_BEO
b) I_CBO
c) I_CEO
d) I_C
Answer: c
Explanation: In the cut off region, a small amount of collector current flows even when base current I_B is zero. This is called I_CEO. Since the main current is also zero, the transistor is said to be cut off.

38. A change in 700mV in base emitter voltage causes a change of 200µA in the base current. Determine the dynamic input resistance.
a) 2kΩ
b) 10kΩ
c) 3kΩ
d) 3.5kΩ
Answer: c
Explanation: r_o=∆V_BE/∆I_B
=700m/200µ=3.5kΩ.

39. The change in collector emitter voltage from 6V to 9V causes increase in collector current from 6mA to 6.3mA. Determine the dynamic output resistance.
a) 20kΩ
b) 10kΩ
c) 50kΩ
d) 60kΩ
Answer: b
Explanation: r_o=∆V_CE/∆I_C
=3/0.3m=10kΩ.

40. Which of the following points locates the quiescent point?
a) (I_C, V_CB)
b) (I_E, V_CE)
c) (I_E, V_CB)
d) (I_C, V_CE)
Answer: a
Explanation: The quiescent point is best located between the cut off and saturation point. I_E= V_EE/R_E, V_CB=V_CC-I_CR_L. It is denoted by ‘Q’.

41. The input resistance in a CB transistor is given by _________
a) ∆V_CE/∆I_B
b) ∆V_BE/∆I_B
c) ∆V_BE/∆I_C
d) ∆V_EB/∆I_E
Answer: d
Explanation: The ratio of change in emitter base voltage (∆V_EB) to resulting change in emitter current (∆I_E) at constant collector base voltage (V_CB) is defined as input resistance. This is denoted by r_i.

42. The output resistance of CB transistor is given by _________
a) ∆V_CB/∆I_C
b) ∆V_BE/∆I_B
c) ∆V_BE/∆I_C
d) ∆V_EB/∆I_E
Answer: a
Explanation: The ratio of change in collector base voltage (∆V_CB) to resulting change in collector current (∆I_C) at constant emitter current (I_E)¬ is defined as output resistance. This is denoted by r_o.

43. Which one of the following depicts the output characteristics for a CB transistor?

Answer: b

Explanation: A graph of I_C against V_CB is drawn. The curve so obtained is known as output characteristics. The emitter current (I_E) is kept constant.

44. The input characteristics of a CE transistor is_________
a)
b)
c)
d)

45. A transistor is connected in CB configuration. The emitter voltage is changed by 200mV, the emitter by 5mA. During this transition the collector base voltage is kept constant. What is the input dynamic resistance?
a) 30Ω
b) 60Ω
c) 40Ω
d) 50Ω

Answer: c
Explanation: The ratio of change in emitter base voltage (∆V_EB) to resulting change in emitter current (∆I_E) at constant collector base voltage (V_CB) is defined as input resistance. This is denoted by r_i.
We know, ∆V_EB/∆I_E=r_i
=200/5=40Ω.

46. When the collector junction is reverse biased and emitter junction is forward biased, the operating region of the transistor is called_________
a) inverted region
b) active region
c) cut off region
d) cut in region
Answer: b
Explanation: In the active region, for small values of base current, the effect of collector voltage over collector current is small while for large base currents this effect increases. The shape of characteristic here is same as that of CB transistors.

47. Which of the following corresponds to the output circuit of a CB transistor?
a) V_BE
b) I_B
c) V_CB
d) V_CE
Answer: c
Explanation: Here, the quantity collector to base voltage corresponds to the output circuit of a CB transistor. The complete electrical behaviour of a transistor can be described by stating the relation between these quantities.

48. The input of a CB transistor is given between_________
a) collector and emitter terminals
b) base ad collector terminals
c) ground and emitter terminals
d) emitter and base terminals
Answer: d
Explanation: The name of the CB transistor says that it’s a common based one. The input is given between the emitter and base terminals and the output is taken between collector and base terminals.

49. The current gain of the CB transistor is_________
a) less than or equal to unity
b) equal to unity
c) greater than unity
d) remains same
Answer: a
Explanation: The input current flowing into the emitter terminal must be higher than the base current and collector current to operate the transistor. Therefore the output collector current is less than the input emitter current.

50. The input characteristics of a CB transistor resembles_________
a) Forward biased diode
b) Illuminated photo diode
c) LED
d) Zener diode
Answer: b
Explanation: The input characteristics resemble the illuminated photo diode and the output characteristics resemble the forward biased diode. This transistor has low input impedance and high output impedance.

51. Which of the following depicts the DC load line?
a)
b)
c)

d)

52. For the circuit shown, find the quiescent point.

a) (10V, 4mA)
b) (4V, 10mA)
c) (10V, 3mA)
d) (3mA, 10V)Answer: c
Explanation: We know, I_E=V_EE/R_E=30/10kΩ=3mA
I_C=α I_E =I_E =3mA
V_CB=V_CC-I_CR_L=25-15=10V. So, quiescent point is (10V, 3mA).

53. Which of the following depicts the load line for the circuit shown below?

a)
b)
c)
d)
Answer: d
Explanation: We know, I_E=V_EE/R_E=15/5kΩ=3mA
I_C=α I_E =I_E =3mA
V_CB=V_CC-I_CR_L=20-15=5V. So, quiescent point is (5V, 3mA).

54. For the circuit shown, find the quiescent point.

a) (6V, 1mA)
b) (4V, 10mA)
c) (10V, 3mA)
d) (3mA, 10V)
Answer: c
Explanation: We know, V_CE=12V
(I_C)_SAT =V_CC/R_L=12/6K=2mA. I_B=10V/0.5M=20µA. I_C= βI_B=1mA. I
V_CE=V_CC-I_CR_L=12-1*6=6V. So, quiescent point is (6V, 1mA).

55. Which of the following depicts the load line for the given circuit?

Answer: d
Explanation: We know, V_CE=6V
(I_C)_SAT =V_CC/R_L=10/2K=5mA. I_B=10V/0.5M=20µA. I_C= βI_B=1mA. I
V_CE=V_CC-I_CR_L=10-1*2=8V. So, quiescent point is (8V, 1mA).

56. The DC equivalent circuit for an NPN common base circuit is.

57. The DC equivalent circuit for an NPN common emitter circuit is.

59. What is the DC characteristic used to prove that the transistor is indeed biased in saturation mode?
a) I_C = βI_B
b) I_C > βI_B
c) I_C >> βI_B
d) I_C < βI_BAnswer: d
Explanation: When in a transistor is driven into saturation, we use V_CE(SAT) as another linear parameter. In, addition when a transistor is biased in saturation mode, we have I_C < βI_B. This characteristic used to prove that the transistor is indeed biased in saturation mode.

60. For the circuit shown, find the quiescent point.

a) (10V, 4mA)
b) (4V, 10mA)
c) (10V, 3mA)
d) (3mA, 10V)Answer: c
Explanation: We know, I_E=V_EE/R_E=10/5kΩ=2mA
I_C=α I_E =I_E =2mA
V_CB=V_CC-I_CR_L=20-10=10V. So, quiescent point is (10V, 2mA).

61. In which of the following configuration does a MOSFET works as an amplifier?
a) Common Source (CS)
b) Common Gate (CG)
c) Common drain (CD)
d) All of the mentioned
Answer: d
Explanation: There are three basic configurations for connecting the MOSFET as an amplifier. Each of these configurations is obtained by connecting one of the three MOSFET terminals to ground, thus creating a two-port network with the grounded terminal being common to the input and output ports.

62. The MOSFET in the following circuit is in which configuration?

a) Common Source (CS)
b) Common Gate (CG)
c) Common Drain (CD)
d) None of the mentioned
Answer: b
Explanation: It is the circuit for Common gate configuration.

63. The MOSFET in the following circuit is in which configuration?

a) Common Source (CS)
b) Common Gate (CG)
c) Common Drain (CD)
d) None of the mentioned
Answer: c
Explanation: It is the circuit for Common drain configuration.

64. The MOSFET in the following circuit is in which configuration?[/expand]
a) Common Source (CS)
b) Common Gate (CG)
c) Common Drain (CD)
d) None of the mentionedAnswer: a
Explanation: It is the circuit for Common source configuration.

(Q.65-Q.70) Reference circuit for Q.5-Q.10 The circuit below is the characterization for the amplifier as a functional block.

65. If the value of R_in for the common source configuration is R₁ and that for common source with a source resistance configuration is R₂ ideally. The ratio of R₁/R₂ will be
a) R₁/R₂ = 1
b) 0 < R₁/R₂ < 1
c) R₁/R₂ > 1
d) R₁/R₂ = 0
Answer: a
Explanation: Ideally both must have infinite resistance.

66. Which is true for the value of A_vo for common source (Represented by A₁) and common source with a source resistance (represented by A₂).
a) A₁ = A₂
b) A₁ > ₂
c) A₁ < A₂
d) |A₁| < |A₂|
Answer: c
Explanation: A₁ = -g_mR_D and A₂ = -g_mR_D/1+g_mR_S
Reference circuit for Common source configuration

Reference circuit for common source with source resistance R_S

70. Which of the following has A_VO independent of the circuit elements?
a) Common source configuration
b) Common gate configuration
c) Source follower configuration
d) None of the mentioned
Answer: c
Explanation: A_VO = 1 source follower.

71. If a MOSFET is to be used in the making of an amplifier then it must work in
a) Cut-off region
b) Triode region
c) Saturation region
d) Both cut-off and triode region can be used
Answer: c
Explanation: Only in the saturation region a MOSFET can operate as an amplifier.

72. For MOSFET is to be used as a switch then it must operate in
a) Cut-off region
b) Triode region
c) Saturation region
d) Both cut-off and triode region can be used
Answer: d
Explanation: In both regions it can perform the task of a switch.

(Q73 & Q.74) Using the circuit shown below,

73. Determine the conditions in which the MOSFET is operating in the triode region.
i. V_GD > V_t (Threshold voltage)
ii. V_DS > V_OV
iii. I_D ∝ (V_OV – 0.5V_DS)V_DS

a) i, ii, and iii are correct
b) i and iii are correct
c) i and ii are correct
d) ii and iii are correct
Answer: b
Explanation: Only the points I and iii are correct and ii is false.

74. Determine the conditions in which the MOSFET is operating in the saturation region
i. V_GD > V_t (Threshold voltage)
ii. V_DS > V_OV
iii. I_D ∝ (V_OV)²

a) i, ii, and iii are correct
b) i and iii are correct
c) i and ii are correct
d) ii and iii are correct
Answer: d
Explanation: i is false and ii and iii are true.

75. In the saturation region of the MOSFET the saturation current is
a) Independent of the voltage difference between the source and the drain
b) Depends directly on the voltage difference between the source and the drain
c) Depends directly on the overdriving voltage
d) Depends directly on the voltage supplied to the gate terminal
Answer: a
Explanation: Saturation current does not depends on the voltage difference between the source and the drain in the saturation region of a MOSFET.

76. An n-channel MOSFET operating with V_OV=0.5V exhibits a linear resistance = 1 kΩ when V_DS is very small. What is the value of the device transconductance parameter k_n?
a) 2 mA/V²
b) 20 mA/V²
c) 0.2 A/V²
d) 2 A/V²
Answer: a
Explanation: Use the standard mathematical expression to determine the value of k_n.

77. An NMOS transistor is operating at the edge of saturation with an overdrive voltage V_OV and a drain current I_D. If is V_OV is doubled, and we must maintain operation at the edge of saturation, what value of drain current results?
a) 0.25I_D
b) 0.5I_D
c) 2I_D
d) 4I_D
Answer: c
Explanation: I₀ is directly proportional to V_OS.

(Q.78-Q.80) Using the circuit below answer the question

78. Which of the following is true for the triode region?
a. V_DG > V_tp
b. V_SD < V_OV
c. I_D ∝ V_OV
d. None of the mentioned
Answer: d
Explanation: V_DG > |V_tp| and V_SD < |V_OV|.

79. Which of the following is true for the saturation region?
a) V_DG ≤ |V_tp|
b) V_SD ≤| V_OV|
c) V_DG < |V_tp|
d) V_SD <| V_OV|Answer: a
Explanation: It is a characteristic for the saturation region.

80. The current i_D
a) Depends linearly on V_OV in the saturation region
b) Depends on the square of V_OV in the saturation region
c) Depends inversely on V_OV in the triode region
d) None of the mentioned
Answer: b
Explanation: Use the standard mathematical expressions for i₀ in different regions.

1. The feature of an approximate model of a transistor is
a) it helps in quicker analysis
b) it provides individual analysis for different configurations
c) it helps in dc analysis
d) ac analysis is not possible
Answer: a
Explanation: The small signal model helps in quicker ac analysis of a transistor. The approximate model is applicable for all the configurations. The dc analysis is not obtained by using a small signal model of transistor.

2 A transistor has h_fe=100, h_ie=2kΩ, h_oe=0.005mmhos, h_re=0. Find the output impedance if the lad resistance is 5kΩ.
a) 5kΩ
b) 4kΩ
c) 20kΩ
d) 15kΩ
Answer: b
Explanation: R_O=I/h_oe=1/0.005m
=20kΩ.R_O^I= R_O || R_L^I=20||5
=4kΩ.

3. A CE amplifier when bypassed with a capacitor at the emitter resistance has
a) increased input resistance and increased voltage gain
b) increased input resistance and decreased voltage gain
c) decreased input resistance and increased voltage gain
d) decreased input resistance and decreased voltage gain

4. A transistor has h_ie =2kΩ, h_oe=25µmhos and h_fe=60 with an unbypassed emitter resistor Re=1kΩ. What will be the input resistance and output resistance?
a) 90kΩ and 50kΩ respectively
b) 33kΩ and 45kΩ respectively
c) 6kΩ and 40kΩ respectively
d) 63kΩ and 40kΩ respectively
Answer: d
Explanation: As the emitter is unbypassed, the input resistance Ri=h_ie+(1+h_fe)Re
=2+61=63kΩ. The output resistance R_O=1/h_oe=1/25MΩ=40kΩ.

5. A transistor has h_ie =1KΩ and h_fe=60 with an bypassed emitter resistor R_e=1kΩ. What will be the input resistance and output resistance?
a) 90kΩ and 50kΩ respectively
b) 33kΩ and 45kΩ respectively
c) 6kΩ and 40kΩ respectively
d) 63kΩ and 40kΩ respectively
Answer: d
Explanation: As the emitter is bypassed, the input resistance R_i=h_ie
=1kΩ. The output resistance R_O=1/h_oe but the value is not given.
So, h_oe=0 and R_O=1/0=∞.

6. In the given circuit, find the equivalent resistance between A and B nodes.

a) 100kΩ
b) 50kΩ
c) 40kΩ
d) 60kΩ
Answer: b
Explanation: R_AB=R_O||100Ω
= (R_S^I+h_ie/1+h_fe)||100
=9+1/100||100=100||100=50Ω.

7. Which of the following acts as a buffer?
a) CC amplifier
b) CE amplifier
c) CB amplifier
d) cascaded amplifier
Answer: a
Explanation: The voltage gain of a common collector amplifier is unity. It is then used as a buffer. The CC amplifier is also called as an emitter follower. Though there is no amplification done, the output will be stabilised.

8. Which of the following is true?
a) CC amplifier has a large current gain
b) CE amplifier has a large current gain
c) CB amplifier has low voltage gain
d) CC amplifier has low current gain
Answer: b
Explanation: The CE amplifier has high current and voltage gains. The CC amplifier has unity voltage gain which cannot be regarded as high. The common base amplifier has a unity current gain and high voltage gain.

9. In an NPN silicon transistor, α=0.995, I_E=10mA and leakage current I_CBO=0.5µA. Determine I_CEO.
a) 10µA
b) 100µA
c) 90µA
d) 500µA
Answer: b
Explanation: I_C=α I_E +I_CBO =0.995*10mA+0.5µA=9.9505mA.
I_B=I_E-I_C=10-9.9505=0.0495mA. β=α/(1-α)=0.995/(1-0.995)=199
I_CEO=9.9505-199*0.0495=0.1mA==100µA.

10. In CB configuration, the value of α=0.98A. A voltage drop of 4.9V is obtained across the resistor of 5KΩ when connected in collector circuit. Find the base current.
a) 0.01mA
b) 0.07mA
c) 0.02mA
d) 0.05mA
Answer: c
Explanation: Here, I_C=4.9/5K=0.98mA
α = I_C/I_E .So,
I_E=I_C/α=0.98/0.98=1mA.
I_B=I_E-I_C=1-0.98=0.02mA.

11. A transistor with ß = 120 is biased to operate at a dc collector current of 1.2 mA. Find the value of gm.
a) 12mA/V
b) 24 mA/V
c) 36 mA/V
d) 48 mA/V
Answer: d
Explanation:

12. A transistor with ß = 120 is biased to operate at a dc collector current of 1.2 mA. Find the value of R?p.
a) 625 ohm
b) 1250 ohm
c) 2500 ohm
d) 5000 ohm
Answer: c
Explanation:

13. A transistor with ß = 120 is biased to operate at a dc collector current of 1.2 mA. Find the value of Re.
a) 2.5 ohm
b) 20.6 ohm
c) 25.2 ohm
d) 30.4 ohm
Answer: b
Explanation:

14. A transistor operating with nominal gm of 60 mA/V has a ß that ranges from 50 to 200. Also, the bias circuit, being less than ideal, allows a 20% variation in Ic. What is the smallest value found of the resistance looking into the base?
a) 347 ohm
b) 694 ohm
c) 1041 ohm
d) 1388 ohm

Answer: b
Explanation:

15. A transistor operating with nominal gm of 60 mA/V has a ß that ranges from 50 to 200. Also, the bias circuit, being less than ideal, allows a 20% variation in Ic. What is the largest value found of the resistance looking into the base?
a) 1050 ohm
b) 21000 ohm
c) 3150 ohm
d) 4200 ohm
Answer: d
Explanation:

16. A designer wishes to create a BJT amplifier with a gm of 50 mA/V and a base input resistance of 2000 O or more. What is the minimum ß he can tolerate for the transistor used?
a) 100
b) 150
c) 200
d) 250
Answer: a
Explanation:

17. A designer wishes to create a BJT amplifier with a gm of 50 mA/V and a base input resistance of 2000 O or more. What emitter bis current should he choose?
a) 1.06 mA
b) 1.16 mA
c) 1.26 mA
d) 1.36 mA
Answer: c
Explanation:

18. Which of the following is true?
a) Ib = ß Ic
b) Ib = ß + 1/ Ic
c) Ib = Ic/ß
d) Ib = Ic/ ß – 1
Answer: c
Explanation: The correct relationship between Ic and Ie is Ib = Ic/ß.

19. The SI units of transconductance is
a) Ampere/ volt
b) Volt/ ampere
c) Ohm
d) Siemens
Answer: a
Explanation: Transcoductance is given by Ic/Vt.

20. Which of the following represents the correct mathematical form of the term denoted by the symbol Rp?
a) ß/gm
b) Vt/Ib
c) All of the mentioned
d) None of the mentioned
Answer: c
Explanation: Both of the expressions are identical.

21. The current gain of BJT is_________
a) g_mr_o
b) g_m/r_o
c) g_mr_i
d) g_m/r_i
Answer: c
Explanation: We know, current gain A_V=h_fe. In π model, h_fe is referred to β.
We know, r_i= β/g_m.
From this, β=r_ig_m.

22. For the amplifier circuit of fig. The transistor has β of 800. The mid band voltage gain VO/VI of the circuit will be_________

a) 0
b) <1
c) =1
d) 800
Answer: c
Explanation: The circuit is PNP transistor, collector coupled amplifier. The voltage gain is unity for a CC amplifier. Hence on observation, the CC amplifier gives a unity gain.

23. In a bipolar transistor at room temperature, the emitter current is doubled the voltage across its base emitter junction_________
a) doubles
b) halves
c) increase by about 20mV
d) decreases by about 20mV
Answer: c
Explanation: The change in voltage with temperature can be found by, V(T) = 2.3m(∆T)V_O . In a bipolar transistor at room temperature if the emitter current is doubled the voltage across its base emitter junction thereby doubles.

24. A common emitter transistor amplifier has a collector current of 10mA, when its base current is 25µA at the room, temperature. What is input resistance?
a) 3kΩ
b) 5kΩ
c) 1kΩ
d) 7kΩ
Answer: c
Explanation: We know, β/g_m=r_i
= (I_C/I_B)/(I_C/V_T)=V_T/I_B=25m/25µ=1k.

25. For an NPN transistor connected as shown in below, V_BE=0.7V. Give that reverse saturation current of junction at room temperature is 10-13A, the emitter current is_________

a) 30mA
b) 39mA
c) 29mA
d) 49mA
Answer: d
Explanation: When the collector and base are shorted, the transistor behaves as a normal diode. So, the diode equations imply. I_E=I_O(e^V/V0-1). We get, I_E=49mA.

26. The voltage gain of given circuit below is_________

a) 100
b) 20
c) 10
d) 30
Answer: c
Explanation: The gain for the given circuit can be found by, A_V=R_F/R_S
=100K/10K=10.

27. A small signal source V(t)=Acos20t+Bsin10000t, is applied to a transistor amplifier as shown. The transistor has β=150 and h_ie=3KΩ. What will be the V_O?

a) 1500(Acos20t+Bsin10000t)
b) -150(Acos20t+Bsin10000t)
c) -1500Bsin10000t
d) -150Bsin10000t
Answer: d
Explanation: A_V=-h_fe R_L^I/h_ie=3*150/3=-150. So, V_O=-150V(t)
But cos20t has low frequency so capacitors are open circuited. Only, the sine component is allowed.
So, V_o =-150Bsin10000t.

28. Which of the following statements are correct for basic transistor configurations?
a) CB Amplifiers has low input impedance and low current gain
b) CC Amplifiers has low input impedance and high current gain
c) CE Amplifiers has very poor voltage gain but very high input impedance
d) The current gain of CB Amplifier is higher than the current gain of CC Amplifiers
Answer: a
Explanation: The CE amplifier has moderate input and output impedances. The CC amplifier has unity voltage gain. The common ba se amplifier has a unity current gain and high voltage gain.

29. The collector current is 2.945A and α=0.98. The leakage current is 2µA. What is the emitter current and base current?
a) 3mA and 55µA
b) 2.945mA and 55µA
c) 3.64mA and 33µA
d) 5.89mA and 65µA
Answer: a
Explanation: (I_C – I_CBO)/α=I_E
= (2.945-0.002)/0.98=3mA.
I_E=I_C+I_B . So, I_B=3-2.495=0.055mA=55µA.

30. The change in collector emitter voltage from 6V to 9V causes increase in collector current from 6mA to 6.3mA. Determine the dynamic output resistance.
a) 20kΩ
b) 10kΩ
c) 50kΩ
d) 60kΩ
Answer: b
Explanation: r_o=∆V_CE/∆I_C
=3/0.3m=10kΩ.

31. A transistor is connected in CB configuration. The emitter voltage is changed by 200mV, the emitter by 5mA. During this transition the collector base voltage is kept constant. What is the input dynamic resistance?
a) 30Ω
b) 60Ω
c) 40Ω
d) 50Ω
View Answer

1. In Miller’s theorem, what is the constant K?
a) Total voltage gain
b) Internal voltage gain
c) Internal current gain
d) Internal power gain
Answer: b
Explanation: The constant K=V₂/V₁, which is the internal voltage gain of the network.
Thus resistance R_M=R/1-K
R_N=R/1-K^-1.

2. When applying miller’s theorem to resistors, resistance R1 is for node 1 and R2 for node 2. If R1>R2, then for same circuit, then for capacitance for which the theorem is applied, which will be larger, C1 or C2?
a) C1
b) C2
c) Both are equal
d) Insufficient data
Answer: a
Explanation: Given R1>R2
R/1-K > R/1-K^-1, and so 1-K^-1>1-K
Thus K²>1, K>1, K<-1 (correct)
Thus, C1=C(1-K) and C2=C(1-K^-1)
Hence C1>C2

3. Find net voltage gain, given h_fe = 50 and h_ie = 1kΩ.

a) 27.68
b) -22
c) 30.55
d) -27.68
Answer: d
Explanation: Apply millers theorem to resistance between input and output.
At input, R_M=100k/1-K = R_I
Output, R_N=100k/1-K^-1 ≈ 100k
Internal voltage gain , K = -h_feR_L’/h_ie
K = – 50xR_c||100k/1k = – 50x4x100/104= – 192
R_I = 100k/1+192 = 0.51kΩ
R_I’ = R_I||h_ie = 0.51k||1k = 0.51×1/1.51 = 0.337kΩ
Net voltage gain = K.R_I’/R_S+R_I’ = – 192 x 0.337/2k + 0.337k = -27.68.

4. Given that capacitance w.r.t the input node is 2pF and output node is 4pF, find capacitance between input and output node.
a) 0.67 pF
b) 1.34pF
c) 0.44pF
d) 2.2pF
Answer: a
Explanation: C1=C(1-K), C2=C(1-K^-1)
C1=2pF
C2=4pF
C1/C2=1/2=1-K/1-K-1
K = -2
C1 = C(1+2) = 3C
C = C1/3 = 2/3pF = 0.67 pF.

5. Consider an RC coupled amplifier at low frequency. Internal voltage gain is -120. Find the voltage gain magnitude, when given that collector resistance = 1kΩ, load = 9kΩ, collector capacitance is 0. is 0.1μF, and input frequency is 20Hz.
a) 120
b) 12
c) 15
d) -12
Answer: c
Explanation: A_V = -120
f_L = 1/2πC_C(R_C+R_L) = 1/2π*0.001 = 1000/2π = 159.15Hz
A_V’ = |AV|1√+(fLf)2
A_V’ = 120/8.02 ≈ 15.

6. Find the 3-dB frequency given that the gain of RC coupled amplifier is 150, the low frequency voltage gain is 100 and the input frequency is 50Hz.
a) 50.8 Hz
b) 55.9 Hz
c) 60Hz
d) 100Hz
Answer: b
Explanation: A_VM = 150
A_VL = 100
f = 50Hz
100 = 1501√+(fL50)2
1+f²/2500 =1.5²
f² = 2500*1.25 = 3125
f = 55.90 Hz.

7. Given collector resistance = 2kΩ, load resistance = 5kΩ, collector capacitance = 1μF, emitter capacitance = 20μF, collector current = 2mA, source resistance = 2kΩ. If the effect of blocking capacitor is ignored, find the applicable cut-off frequency.
a) 22.73 Hz
b) 612 Hz
c) 673Hz
d) 317 Hz
Answer: b
Explanation: R_C = 2kΩ, R_L = 5kΩ, C_C = 1μF, C_B = 10μF, C_E = 20μF, R_S = 2 kΩ
h_ie = 1kΩ, I_C = 2mA
f_L1 = 1/2πC_C(R_C+R_L) = 22.73 Hz
f_L2 = g_m/2πC_E = I_C/2πC_EV_T = 612 Hz
Since f_L2 > 4f_L1, hence f_L2 is the correct answer.

8. Consider the circuit shown.

h_fe = 50, h_ie = 1000Ω. Find magnitude of voltage gain at input frequency 10Hz.
a) 100
b) 133
c) 166
d) 220
Answer: b
Explanation: Net load = 10k||10k = 5kΩ = R_L’
A_VM = -h_feR_L’/h_ie = -50×5/1 = -250
f_L = 1/2πC_C(R_C+R_L) = 15.9 Hz
A_VL = AVM1√+(fLf)2 = 133.

9. What is the phase shift in RC coupled CE amplifier at lower 3dB frequency?
a) 180°
b) 225°
c) 270°
d) 100°

Answer: b
Explanation: Total phase shift = 180°+ tan^-1(f_L/f)
At 3dB frequency f_L/f = 1
Total phase shift = 180° + 45° = 225°.

10. Consider that the phase shift of an RC coupled CE amplifier is 260°. Find the low frequency gain when the voltage gain of the transistor is -150.
a) 100
b) 26
c) 40
d) 55
Answer: b
Explanation: 180° + tan^-1(f_L/f) = 260°
f_L/f = tan(80) = 5.67
A = 1501√ + 5.672 = 26.05.

11. During high frequency applications of a B.J.T., which parasitic capacitors arise between the base and the emitter?
a) C_je and C_b
b) C_cs
c) C_b
d) C_cs and C_b
Answer: a
Explanation: There are two capacitors which arise between bases and emitter. One is C_je due to depletion region associated between base and emitter. C_b is another capacitor which arises due to the accumulation of electrons in the base which further results into the concentration gradient within the base of the transistor.

12. During high frequency applications of a B.J.T., which parasitic capacitors arise between the collector and the emitter?
a) No capacitor arises
b) C_cs
c) C_b
d) C_cs and C_b
Answer: a
Explanation: The emitter and the collector are far away from each other when the B.J.T. is being constructed. Hence, we find that they don’t share a common junction where charges can accumulate. Thus, no such parasitic capacitors appear.

13. During high frequency applications of a B.J.T, which parasitic capacitors arise between the collector and the base?
a) C_je and C_b
b) C_cs
c) C_π
d) C_µ
Answer: d
Explanation: Only one capacitor up between the base and the collector. This is due to the depletion region present between the base and the collector region.

14. Which parasitic capacitors are present at the collector terminal of the B.J.T.?
a) C_je and C_b
b) C_cs and C_µ
c) C_b
d) C_cs and C_b
Answer: b
Explanation: There are two capacitors attached to the collector terminal. The collector-base junction provides a depletion capacitance (C_µ) while the collector substrate junction provides a certain capacitance (C_cs).

15. Which parasitic capacitors do not affect the frequency response of the C.E. stage, of the B.J.T.?
a) C_je and C_b
b) C_cs and C_µ
c) C_b and C_µ
d) No parasitic capacitor gets deactivated
Answer: d
Explanation: While observing the frequency response of a C.E. stage, we find that all the parasitic capacitances of the B.J.T. end up slowing the speed of the B.J.T. The frequency response of this stage is affected by all the parasitic capacitors.

16. During high frequency applications of a B.J.T., which parasitic capacitors arise between the base and the emitter?
a) C_je and C_b
b) C_cs
c) C_b
d) C_cs and C_b
Answer: a
Explanation: There are two capacitors which arise between bases and emitter. One is C_je due to depletion region associated between base and emitter. C_b is another capacitor which arises due to the accumulation of electrons in the base which further results into the concentration gradient within the base of the transistor.

17. During high frequency applications of a B.J.T., which parasitic capacitors arise between the collector and the emitter?
a) No capacitor arises
b) C_cs
c) C_b
d) C_cs and C_b
Answer: a
Explanation: The emitter and the collector are far away from each other when the B.J.T. is being constructed. Hence, we find that they don’t share a common junction where charges can accumulate. Thus, no such parasitic capacitors appear.

18. During high frequency applications of a B.J.T, which parasitic capacitors arise between the collector and the base?
a) C_je and C_b
b) C_cs
c) C_π
d) C_µ
Answer: d
Explanation: Only one capacitor up between the base and the collector. This is due to the depletion region present between the base and the collector region.

19. Which parasitic capacitors are present at the collector terminal of the B.J.T.?
a) C_je and C_b
b) C_cs and C_µ
c) C_b
d) C_cs and C_b
Answer: b
Explanation: There are two capacitors attached to the collector terminal. The collector-base junction provides a depletion capacitance (C_µ) while the collector substrate junction provides a certain capacitance (C_cs).

20. Which parasitic capacitors do not affect the frequency response of the C.E. stage, of the B.J.T.?
a) C_je and C_b
b) C_cs and C_µ
c) C_b and C_µ
d) No parasitic capacitor gets deactivated
Answer: d
Explanation: While observing the frequency response of a C.E. stage, we find that all the parasitic capacitances of the B.J.T. end up slowing the speed of the B.J.T. The frequency response of this stage is affected by all the parasitic capacitors.

21. Which parasitic capacitors don’t affect the frequency response of the C.B. stage of the B.J.T.?
a) None of the parasitic capacitances
b) All the parasitic capacitances
c) Some of the coupling capacitors
d) C_cs and C_b
Answer: b
Explanation: All the parasitic capacitors of a B.J.T. affect the C.B. stage. None of the parasitic capacitors gets deactivated and they end up behaving as a pole during the frequency response of the C.B. stage.

22. Which parasitic capacitors don’t affect the frequency response of the C.C. stage of the B.J.T.?
a) C_cs
b) C_cs and C_b
c) C_b
d) C_cs and C_µ
Answer: a
Explanation: In the follower stage, the load is present at the emitter. The parasitic capacitors present between the collector and the substrate i.e. C_µ gets deactivated. This is observed from the small signal analysis where both the terminals of this capacitor get shorted to A.C. ground.

23. If the transconductance of the B.J.T increases, the transit frequency ______
a) Increases
b) Decreases
c) Doesn’t get affected
d) Doubles
Answer: a
Explanation: The transit frequency is directly proportional to the transconductance of the B.J.T. Hence, the correct option is increases. Since it hasn’t been mentioned that whether the transconductance has been doubled or not, we cannot conclude the option “doubles” as an answer.

24. If the total capacitance between the base and the emitter increases by a factor of 2, the transit frequency __________
a) reduces by 2
b) increases by 2
c) reduces by 4
d) increases by 4
Answer: a
Explanation: The transit frequency is almost inversely proportional to the total capacitance between the base and the emitter of the B.J.T. Hence, the transit frequency will approximately reduce by 2 and the correct option becomes reduces by 2.

25. Which effect plays a critical role in producing changes in the frequency response of the B.J.T.?
a) Thevenin’s effect
b) Miller effect
c) Tellegen’s effect
d) Norton’s effect
Answer: a
Explanation: The miller effect results in a change in the capacitance seen between the base and the collector. This is why, it affects the frequency response of the B.J.T. deeply by changing the poles and affecting the high frequency voltage gain stage.

26. If a C.E. stage has a load R_l and transconductance g_m, what is the factor by which the capacitance between the base and the collector at the input side gets multiplied?
a) 1 + g_mR_l
b) 1 – g_mR_l
c) 1 + 2*g_mR_l
d) 1 – 2*g_mR_l
Answer: a
Explanation: The low frequency gain of the C.E. stage is g_mR_l. By the application of miller effect, we find that the capacitor between the base and the collector, looking into the input of the C.E. stage, will be increased by a factor of 1 + g_mR_l.

27. If a C.E. stage has a load R_l and transconductance g_m, what is the factor by which the capacitance between the base and the collector at the output side gets multiplied?
a) 1 + 1/g_mR_l
b) 1 – 1/g_mR_l
c) 1 + 2/g_mR_l
d) 1 – 2/g_mR_l
Answer: a
Explanation: The low frequency response of the C.E. stage is g_mR_l. By the application of miller effect, we find that the capacitance between the base and the collector, looking from the output side, will be increased by a factor of 1 + 1/g_mR_l. Hence, the correct option is 1 + 1/ g_mR_l.

28. If a C.E. stage with early effect has a load R_l and transconductance g_m, what is the factor by which the capacitance between the base and the collector at the output side, gets multiplied?
a) 1 + 2/g_m*(R_l || ro)
b) 1 – 1/g_m*(R_l || ro)
c) 1 + 1/g_m*(R_l || ro)
d) 1 – 2/g_m*(R_l || ro)
Answer: c
Explanation: If the early effect is considered, the low frequency response of the C.E. stage becomes g_m*(R_l || ro). Thereby, miller approximation shows that the capacitance between the base and the collector, looking from the output side, will be increased by a factor of 1 + 1/g_m*(R_l || ro). Hence the correct option is 1 + 1/ g_m*(R_l || ro).

29. For a high frequency response of a simple C.E. stage with a transconductance of g_m, what is C_in?
a) C_µ(1 + g_m*R₂) – C_π
b) C_µ(1 + g_m*R₂) + C_π
c) C_µ(1 – 2*_gm*R₂) + C_π
d) C_µ(1 + 2*_gm*R₂) – C_π
Answer: b
Explanation: The input capacitance is an equivalent of the base to emitter capacitance in parallel to the miller approximation of the base to collector capacitance. Due to miller approximation, the base to collector capacitance becomes C_µ(1+g_m*R₂) while the base to emitter capacitance is C_π. Capacitors get added, when in parallel and thus C_µ(1+g_m*R₂) + C_π is correct.

30. For a high frequency response of a simple C.E. stage with a transconductance of g_m, what is C_out?
a) C_cs – C_µ*(2 + 1/g_m*R₂)
b) C_cs + C_µ*(1 + 2/g_m*R₂)
c) C_cs – C_µ*(1 + 1/g_m*R₂)
d) C_cs + C_µ*(1 + 1/g_m*R₂)
Answer: d
Explanation: We have a capacitor from the collector to substrate, C_cs, which comes in parallel to the miller approximation of the capacitance from base to collector. The miller approximation defines the latter as C_µ*(1 + 1/g_m*R₂). Since capacitors gets added, when in parallel, the correct option is C_cs + C_µ*(1+ 1/g_m*R₂).

a) None of the parasitic capacitances
b) All the parasitic capacitances
c) Some of the coupling capacitors
d) C_cs and C_b
Answer: b
Explanation: All the parasitic capacitors of a B.J.T. affect the C.B. stage. None of the parasitic capacitors gets deactivated and they end up behaving as a pole during the frequency response of the C.B. stage.

31. Which parasitic capacitors don’t affect the frequency response of the C.C. stage of the B.J.T.?
a) C_cs
b) C_cs and C_b
c) C_b
d) C_cs and C_µ
Answer: a
Explanation: In the follower stage, the load is present at the emitter. The parasitic capacitors present between the collector and the substrate i.e. C_µ gets deactivated. This is observed from the small signal analysis where both the terminals of this capacitor get shorted to A.C. ground.

32. If the transconductance of the B.J.T increases, the transit frequency ______
a) Increases
b) Decreases
c) Doesn’t get affected
d) Doubles
Answer: a
Explanation: The transit frequency is directly proportional to the transconductance of the B.J.T. Hence, the correct option is increases. Since it hasn’t been mentioned that whether the transconductance has been doubled or not, we cannot conclude the option “doubles” as an answer.

33. If the total capacitance between the base and the emitter increases by a factor of 2, the transit frequency __________
a) reduces by 2
b) increases by 2
c) reduces by 4
d) increases by 4
Answer: a
Explanation: The transit frequency is almost inversely proportional to the total capacitance between the base and the emitter of the B.J.T. Hence, the transit frequency will approximately reduce by 2 and the correct option becomes reduces by 2.

34. Which effect plays a critical role in producing changes in the frequency response of the B.J.T.?
a) Thevenin’s effect
b) Miller effect
c) Tellegen’s effect
d) Norton’s effect
Answer: a
Explanation: The miller effect results in a change in the capacitance seen between the base and the collector. This is why, it affects the frequency response of the B.J.T. deeply by changing the poles and affecting the high frequency voltage gain stage.

35. If a C.E. stage has a load R_l and transconductance g_m, what is the factor by which the capacitance between the base and the collector at the input side gets multiplied?
a) 1 + g_mR_l
b) 1 – g_mR_l
c) 1 + 2*g_mR_l
d) 1 – 2*g_mR_l
Answer: a
Explanation: The low frequency gain of the C.E. stage is g_mR_l. By the application of miller effect, we find that the capacitor between the base and the collector, looking into the input of the C.E. stage, will be increased by a factor of 1 + g_mR_l.

36. If a C.E. stage has a load R_l and transconductance g_m, what is the factor by which the capacitance between the base and the collector at the output side gets multiplied?
a) 1 + 1/g_mR_l
b) 1 – 1/g_mR_l
c) 1 + 2/g_mR_l
d) 1 – 2/g_mR_l
Answer: a
Explanation: The low frequency response of the C.E. stage is g_mR_l. By the application of miller effect, we find that the capacitance between the base and the collector, looking from the output side, will be increased by a factor of 1 + 1/g_mR_l. Hence, the correct option is 1 + 1/ g_mR_l.

37. If a C.E. stage with early effect has a load R_l and transconductance g_m, what is the factor by which the capacitance between the base and the collector at the output side, gets multiplied?
a) 1 + 2/g_m*(R_l || ro)
b) 1 – 1/g_m*(R_l || ro)
c) 1 + 1/g_m*(R_l || ro)
d) 1 – 2/g_m*(R_l || ro)
Answer: c
Explanation: If the early effect is considered, the low frequency response of the C.E. stage becomes g_m*(R_l || ro). Thereby, miller approximation shows that the capacitance between the base and the collector, looking from the output side, will be increased by a factor of 1 + 1/g_m*(R_l || ro). Hence the correct option is 1 + 1/ g_m*(R_l || ro).

38. For a high frequency response of a simple C.E. stage with a transconductance of g_m, what is C_in?
a) C_µ(1 + g_m*R₂) – C_π
b) C_µ(1 + g_m*R₂) + C_π
c) C_µ(1 – 2*_gm*R₂) + C_π
d) C_µ(1 + 2*_gm*R₂) – C_π
Answer: b
Explanation: The input capacitance is an equivalent of the base to emitter capacitance in parallel to the miller approximation of the base to collector capacitance. Due to miller approximation, the base to collector capacitance becomes C_µ(1+g_m*R₂) while the base to emitter capacitance is C_π. Capacitors get added, when in parallel and thus C_µ(1+g_m*R₂) + C_π is correct.

39. For a high frequency response of a simple C.E. stage with a transconductance of g_m, what is C_out?
a) C_cs – C_µ*(2 + 1/g_m*R₂)
b) C_cs + C_µ*(1 + 2/g_m*R₂)
c) C_cs – C_µ*(1 + 1/g_m*R₂)
d) C_cs + C_µ*(1 + 1/g_m*R₂)
Answer: d
Explanation: We have a capacitor from the collector to substrate, C_cs, which comes in parallel to the miller approximation of the capacitance from base to collector. The miller approximation defines the latter as C_µ*(1 + 1/g_m*R₂). Since capacitors gets added, when in parallel, the correct option is C_cs + C_µ*(1+ 1/g_m*R₂).

40. Ignoring early effect, if R₁ is the total resistance connected to the base and R₂ is the total resistance connected at the collector, what could be the approximate input pole of a simple C.E. stage?
a) 1 / [R₁ * (C_µ(2+g_m*R₂) + C_π)]
b) 1 / [R₁ * (C_µ(1+2*g_m*R₂) + C_π)]
c) 1 / [R₁ * (C_µ(1+g_m*R₂) + C_π)]
d) 1 / [R₁ * (C_µ(1-g_m*R₂) + C_π)]
Answer: c
Explanation: The input pole can be approximately calculated by observing the input node. The input node is the node where the base of the B.J.T. is connected to the input voltage. The product of total resistance and capacitance connected at that particular node is R₁ * C_in and C_in is C_µ(1+g_m*R₂) + C_π- the inverse of this product gives us the input pole. Thus the correct option is 1 / [R₁ * (C_µ(1+g_m*R₂) + C_π)].

41. Ignoring early effect, if R₂ is the total resistance at the collector, what could be the approximate output pole of a simple C.E. stage?
a) 1 / [R₂ * (C_cs + C_µ*(1 + 2/g_m*R₂))]
b) 1 / [R₂ * (C_cs – C_µ*(1 + 1/g_m*R₂))]
c) 1 / [R₂ * (C_cs + C_µ*(1 – 1/g_m*R₂))]
d) 1 / [R₂ * (C_cs + C_µ*(1 + 1/g_m*R₂))]
Answer: d
Explanation: The output pole can be approximately calculated by observing the output node. For a C.E. stage, the output node is the node where the Collector of the B.J.T. is connected to the output measuring device. The product of total resistance and capacitance connected at that particular node is R₂ * C_out and C_out is (C_cs + C_µ*(1 + 1/g_m*R₂). The inverse of this product gives us the output pole. Thus the correct option is 1 / [R₂ * (C_cs + C_µ*(1 + 1/g_m*R₂))].

42. If the load resistance of a C.E. stage increases by a factor of 2, what happens to the high frequency response?
a) The 3 db roll off occurs faster
b) The 3 db roll off occurs later
c) The input pole shifts towards origin
d) The input pole becomes infinite
Answer: a
Explanation: If the load resistance increases by a factor of 2, the output pole decreases since it’s inversely proportional to the load resistance. Hence the C.E. stage experiences a faster roll off due to the pole.

43. During high frequency applications of a B.J.T., which of the following three stages do not get affected by Miller’s approximation?
a) C.E.
b) C.B.
c) C.C.
d) Follower
Answer: b
Explanation: During the C.B. stage, the capacitance between the base and the collector doesn’t suffer from Miller approximation since the input is applied to the emitter of the B.J.T. There are no capacitors connected between two nodes having a constant gain. Hence the C.B. stage doesn’t get affected by miller approximation.

44. Ignoring early effect, if C₁ is the total capacitance tied to the emitter, what is the input pole of a simple C.B. stage?
a) 1/g_m * C₁
b) 2/g_m * C₁
c) g_m * C₁
d) g_m * 2C₁
Answer: a
Explanation: The resistance looking into the emitter of the B.J.T. is 1/g_m. The capacitance connected to the input node is C₁ (as mentioned). The inverse product of these two provides us the input pole of the C.B. stage.

45. Ignoring early effect, if R₁ is the total resistance connected to the collector; what is the output pole of a simple C.B. stage?
a) 1/[R₁ * (C_cs + C_µ)]
b) 1/[R₁* (C_cs + 2*C_µ)]
c) 1/[R₁ * (2*C_cs + C_µ)]
d) 1/[R₁ * 2*(C_cs + C_µ)]
Answer: a
Explanation: The output pole is calculated, approximately, by the inverse product of the total resistance and the capacitance connected at the output node. We find that the total resistance connected to the output node is R₁ while the total capacitance is C_cs + C_µ. In absence of early effect, 1/[R₁ * (C_cs + C_µ)] becomes the output pole.

46. If early effect is included, and R₁ is the total resistance connected at the collector. What is the output pole of a simple C.B. stage?
a) 1/[(R₁ || ro) * 2(C_cs + C_µ)]
b) 1/[(R₁ || ro) * (C_cs + C_µ)]
c) 1/[(R₁ || ro) * (2*C_cs + C_µ)]
d) 1/[(R₁ || ro) * 2*(C_cs + 2*C_µ)]
Answer: b
Explanation: The output pole is calculated, approximately, by the inverse product of the total resistance and the capacitance connected at the output node. We find that the total resistance connected to the output node is R₁ in parallel with ro, due to early effect, while the total capacitance is C₂ ie C_cs + C_µ. Thus, the correct option is 1/[(R₁ || ro) * (C_cs + C_µ)].

47. In a simple follower stage, C₂ is a parasitic capacitance arising due to the depletion region between the collector and the substrate. What is the value of C₂?
a) 0
b) Infinite
c) C_cs
d) 2*C_cs
Answer: a
Explanation: During the high frequency response, the capacitor between the collector and the substrate gets shorted to A.C. ground at both of its terminals. Hence, C₂=0. The answer would have been C_cs for any other stage of B.J.T.

48. For a cascode stage, with input applied to the C.B. stage, the input capacitance gets multiplied by a factor of ____
a) 0
b) 1
c) 3
d) 2
Answer: d
Explanation: The small signal gain, of the C.B. stage, in a cascode stage is approximately equal to the ratio of the transconductances of the two B.J.T.’s. Since they are roughly same, the gain is 1. Miller multiplication leads to multiplying the capacitance, between base and collector, by a factor of (1 + small signal gain) which is 2. Hence, the correct option is 2.

49. If the B.J.T. is used as a follower, which capacitor experiences Miller multiplication?
a) C_π
b) C_µ
c) C_cs
d) C_b
Answer: a
Explanation: We find that the input is given to the base of the B.J.T. while the output is sensed at the collector of the B.J.T. We observe that the only capacitance connected between two nodes- where there is an amplification unit between the nodes, is C_π. Hence, the correct option is C_π.

50. If 1/h₁₂ = 10 for a C.E. stage- what is the value of the base to collector capacitance, after Miller multiplication, at the output side?
a) 1.1C_µ
b) 1.2C_µ
c) 2.1C_µ
d) 2.2C_µ
Answer: a
Explanation: At the output side of a C.E. stage, C_µ gets multiplied by a factor of (1+1/A_v) where A_v is the voltage gain. 1/h₁₂ is nothing but A_v. Hence, the value changes to 1.1C_µ.

51. If 1/h₁₂ = 4, for a C.E. stage- what is the value of the base to collector capacitance, after Miller multiplication, at the input side?
a) 4C_µ
b) 5C_µ
c) 6C_µ
d) 1.1C_µ
Answer: c
Explanation: The capacitor, C_µ, gets multiplied by a factor of (1 + A_v), at the input side of a C.E. stage. 1/h₁₂ is equal to A_v since h₁₂ is the reverse voltage amplification factor. Hence, the final value becomes 5C_µ.

52. The transconductance of a B.J.T.is 5mS (g_m) while a 2KΩ (R_l) load resistance is connected to the C.E. stage. Neglecting Early effect, what is the Miller multiplication factor for the input side?
a) 21
b) 11
c) 20
d) 0
Answer: b
Explanation: The Miller multiplication factor for the input side of a C.E. stage is (1+A_v). Now, Av is the small signal low frequency gain of the C.E. stage which is g_m*R_L=10. Hence, the Miller multiplication factor is 11.

53. We cannot use h-parameter model in high frequency analysis because ____________
a) They all can be ignored for high frequencies
b) Junction capacitances are not included in it
c) Junction capacitances have to be included in it
d) AC analysis is difficult for high frequency using it
Answer: b
Explanation: The effect of smaller capacitors is considerable in high frequency analysis of analog circuits, and hence they cannot be ignored as. Instead of h-parameter model, we use π-model.

54. Consider a CE circuit, where trans-conductance is 50mΩ^-1, diffusion capacitance is 100 pF, transition capacitance is 3 pF. I_B = 20μA. Given base emitter dynamic resistance, r_be = 1000 Ω, input V_I is 20*sin(10⁷t). What is the short circuit current gain?
a) 30
b) 35
c) 40
d) 100
Answer: b
Explanation: A_I = I_L/I_B
I_L = -g_mV_b’e
V_b’e = I_b r_b’e / (1+jωCr_b’e)
C = C_D + C_T = 103pF
V_b’e = 20μ.1k/(1+j.10⁷.103.10^-12.1000)
A_I = I_L/I_B = 50m.1k/(1+j.10⁷.103.10^-12.1000)
A_I = 35 (approx).

55. Given that transition capacitance is 5 pico F and diffusion capacitance is 80 pico F, and base emitter dynamic resistance is 1500 Ω, find the β cut-off frequency.
a) 7.8 x 10⁶ rad/s
b) 8.0 x 10⁶ rad/s
c) 49.2 x 10⁶ rad/s
d) 22.7 x 10⁶ rad/s
Answer: a
Explanation: The frequency in radians is calculated by
ω_β = 1/C.r_be
ω_β = 7.8 x 10⁶.

56. For given BJT, β=200. The applied input frequency is 20 Mhz and net internal capacitance is 100 pF. What is the CE short circuit current gain at β cut-off frequency?
a) 200
b) 100
c) 141.42
d) 440.2
Answer: c
Explanation: The current gain for the CE circuit is A = β1+(ffβ)2√
At f = f_β, A = β2√
Hence A = 141.42.

57. Given that β=200, input frequency is f= 20Mhz and short circuit current gain is A=100. What is the unity gain frequency?
a) 2300 Mhz
b) 2000 Mhz
c) 2500 Mhz
d) 3000 Mhz
Answer: a
Explanation: A = β1+(20Mhz/fβ)2√
1 + (20/f)² = 4
20/f = 1.732
f_β = 11.54 Mhz
Unity gain frequency = βf_β = 200 x 11.54Mhz = 2308 Mhz.

58. Gain bandwidth frequency is GBP= 3000 Mhz. The cut-off frequency is f=10Mhz. What is the CE short circuit current gain at the β cutoff frequency?
a) 212
b) 220
c) 300
d) 200
Answer: a
Explanation: f_T = 3000Mhz
βf_β = 3000Mhz
β = 3000/10 = 300
A = β2√ = 212.13.

59. Which of the statement is incorrect?
a) At unity gain frequency the CE short circuit current gain becomes 1
b) Unity gain frequency is the same as Gain Bandwidth Product of BJT
c) Gain of BJT decreases at higher frequencies due to junction capacitances
d) β- cut-off frequency is one where the CE short circuit current gain becomes β/2
Answer: d
Explanation: At unity gain frequency the current gain is 1 is a correct statement. The same frequency is f_T = βf_β which is the gain bandwidth product of BJT. Gain of BJT at high frequency decreases due to the junction capacitance. However, at β cut-off frequency, current gain becomes β2√.

60. Given a MOSFET where gate to source capacitance is 300 pF and gate to drain capacitance is 500 pF. Calculate the gain bandwidth product if the transconductance is 30 mΩ^-1.
a) 5.98 Mhz
b) 4.9 Mhz
c) 6.5Mhz
d) 5.22Mhz
Answer: a
Explanation: Gain bandwidth product for any MOSFET is f_T = g_m/2π(C_gs+C_gd)
Thus GBP is approximately 5.9 Mhz.

61. In an RC coupled CE amplifier, when the input frequency increases, which of these are incorrect?
a) Reactance C_SH decreases
b) Voltage gain increases
c) Voltage gain decreases due to shunt capacitance
d) An RC coupled amplifier behaves like a low pass filter
Answer: b
Explanation: When frequency increases, shunt reactance decreases. The voltage drop across shunt capacitance decreases and net voltage gain decrease. RC coupled amplifier acts as a low pass filter at high frequencies.

1. The use of amplifier in a circuit is to _____________ for input signal.
a) Provide a phase shift
b) Provide strength
c) Provide frequency enhancement
d) Make circuit compatible
Answer: b
Explanation: The only use of amplifier in a circuit is to provide strength to signal. This may refer to an increase in current, voltage or power of the output w.r.t the input being applied.

2. The unwanted characteristics of amplifier output apart from the desired output is collectively termed as ___________
a) Inefficiency
b) Damage
c) Fault
d) Distortion
Answer: d
Explanation: The unwanted characteristics of amplifier output apart from desired output is collectively termed as distortion. This should be avoided.

3. Unit of power rating of a transistor is expressed in ___________
a) Watts
b) KWh
c) W/s
d) Wh
Answer: a
Explanation: Power rating is the maximum power allowable to dissipate by a transistor beyond this point transistor may behave unlikely. This is expressed in watts.

4. Which device was used for the amplification of audio signals before the invention of power amplifiers?
a) Diode
b) Op-amp
c) Vacuum tubes
d) SCR
Answer: c
Explanation: Before the invention of power amplifier vacuum tubes are used for audio signal amplification which consumes large space and costly.

5. Power amplifier directly amplifies ___________
a) Voltage of signal
b) Current of the signal
c) Power of the signal
d) All of the mentioned
Answer: d
Explanation: Power amplifier increases voltage as well as current. Increase in voltage or current is small compared to normal amplifiers. But power amplification has occurred ie. Voltage x current is more.

6. Input stage of power amplifier is also called ___________
a) First op
b) Beginning stage
c) Front end
d) Normal stage
Answer: c
Explanation: Input stage of the power amplifier is also called the front end.

7. Transistor in power amplifier is ___________
a) An active device
b) A passive device
c) A op-amp
d) A voltage generating device
answer: a
Explanation: Transistor is an active device since transistor contains voltage sources which are necessary for amplification.

8. For a perfect power amplifier output power rating will be ________ if the output impedance is halved.
a) Halved
b) Squared
c) Doubled
d) Square rooted
Answer: c
Explanation: In the equation of power output for the power amplifier, the power is proportional to the square of the current and inversely proportional to the resistance. If the impedance is halved then power is doubled.

9. Which of the following audio speaker will be hard to be driven by a power amplifier?
a) 4ohm
b) 8ohm
c) 12ohm
d) 2ohm
Answer: d
Explanation: If the resistance of the audio amplifier is less, the output power of the transistor will be high since output current is increasing. Hence to drive 2ohm speaker amplifier needs double power that for 4ohm speaker.

10. The power rating of the amplifier is 100watts then the transistor can only operate at ___________
a) Power higher than 100w
b) Power lower than 100w
c) Power near to 100w
d) Power lower than 200W
Answer: b
Explanation: The power rating is 100 W, and that is the maximum allowable power usage of a transistor, beyond which it may damage. If the power is less than 100W, the circuit operates. Near to 100W, the power may also be higher than 100W, hence that option is incorrect.

11. Why do we use CE amplifier as a large signal class a amplifier?
a) It has very high output impedance
b) It has very high input impedance
c) It has very high voltage gain
d) It is very much stable
Answer: c
Explanation: Since CE amplifier has reasonably high voltage gain and hence can work with high voltage or large signals.

12. What does class A amplifier do?
a) Delivers KV of voltage to load
b) Delivers KW of power
c) Delivers Kilo Pascal pressure
d) Delivers more resistance
Answer: b
Explanation: Class A always delivers more power to load because of a larger current delivered from the transistor.

13. What is the efficiency of Class A amplifiers?
a) 30 or less
b) 50 or less
c) 100
d) 75
Answer: a
Explanation: Since in Class A amplifiers distortion is more and as it requires tuned circuit as load, the efficiency is very low.

14. An ideal large signal amplifier delivers 100% DC power to its load.
a) True
b) False
Answer: a
Explanation: In an ideal case, no distortion occurs, that is noise effects are completely ignored, hence it gives 100% efficiency.

15. Which of the following statement is true about class A amplifiers?
a) They are weak against distortions
b) They supress noise signals
c) More efficient
d) Delivers 100% power to load
Answer: a
Explanation: Since class A amplifiers use basic transistor, even the noise signal will get amplified when the noise signal exists in input.

16. Why there is a need for heat sinks in Class A amplifier?
a) To control the external temperature
b) To avoid temperature changes affecting the transistor
c) To control heat dissipation
d) To increase output resistance
Answer: c
Explanation: When even no input is given to class A amplifiers, it produces some current to load, and hence heat sinks are required to avoid this.

17. Basic operation of Class A amplifiers____________
a) Crossover distortion
b) Law of Conservation of energy
c) Millers law
d) Switching transistor theory
Answer: d
Explanation: The class A amplifier is the simplest form of power amplifier that uses the switching transistor in the standard common emitter configuration.

18. If DC power for a Class A amplifier is 500W and AC power is 150W, what is its efficiency?
a) 50%
b) 75%
c) 20%
d) 30%
Answer: d
Explanation: efficiency=AC POWER/DC POWER
Efficiency=150/500=3/10
In percentage 3*100/10=30%.

19. Which of the following technique is used to increase the efficiency of class A amplifier?
a) By using FET
b) By using PNP transistor
c) By using matched transformers as load
d) By using potentiometers as load
Answer: c
Explanation: We can increase the efficiency of class A amplifier by using load matching concept, hence a pair of matched transformer can be used as load which in turn increases the efficiency.

20. What is the conduction angle of class A amplifier?
a) 90
b) 180
c) 270
d) 360
Answer: d
Explanation: Since the amplifier is always On, it conducts all the current waveform which can be used to state that it has 360 degree conduction angle.

21. Which of these is not true for a class B amplifier?
a) It has zero DC bias
b) They have an efficiency less than that of class A amplifiers
c) The quiescent power dissipation is zero
d) The conduction angle is only 180°
Answer: b
Explanation: The class B amplifier has zero DC bias as the transistors are biased at cut-off only. Each transistor conducts when the input is greater than the base-emitter voltage. The conduction angle is only 180° for this amplifier. They have higher efficiency than class A amplifiers.

22. What is the output of a class B amplifier for sinusoidal input?
a) Sinusoidal amplifier
b) Half-sinusoidal
c) Sinusoidal with higher frequency
d) Square wave
Answer: b
Explanation: If Q-point is in cut-off, then I_C varies only in the positive direction, for saturation, it varies in the negative direction. So the output of Class B amplifier is half sinusoidal. There is no effect in the shape or the frequency of the wave.

23. How do we obtain sinusoidal output out of a class B amplifier?
a) By using non-sinusoidal inputs
b) By utilizing two transistors
c) By biasing it in the active region
d) By adding a capacitor to the output
Answer: b
Explanation: To obtain sinusoidal output from a class B amplifier, two transistors must be used. Such a circuit is a class B push-pull amplifier, used in unturned power amplifiers and audio frequency power amplifiers.

24. In a class B amplifier, it is found that DC power is 25W, find the ac power.
a) 10 W
b) 62.5 W
c) 25 W
d) 50 W
Answer: b
Explanation: For a class B amplifier, figure of merit = 0.4 = dc power/ac power
Thus AC power = DC power/0.4 = 25/0.4 = 62.5 W.

25. When is maximum efficiency of class B amplifier achieved?
a) When V_MAX = V_CC
b) When two transistors are used
c) When V_MIN = 0
d) Efficiency is always constant
Answer: c
Explanation: Efficiency % = [1-V_MIN/V_CC] x 78.5
Maximum efficiency occurs when V_MIN=0 and efficiency is 78.5%.

26. What is the disadvantage of a class B push-pull amplifier?
a) The efficiency reduces
b) The figure of merit increases
c) The cross-over distortion occurs
d) The Q-power dissipation is very large
Answer: c
Explanation: A class B amplifier helps increase efficiency, and figure of merit reduces. The q power dissipation reduces and cross over distortion increases. Due to two transistors, when one transistor turns off the other does not begin conduction immediately, hence output current is zero for a short interval.

27. Read statements and select the correct option below.
A: A push-pull amplifier decreases harmonic distortion
B: Output has half-wave symmetry
a) A and B are both correct and B is the correct reason for A
b) A is correct and B is incorrect
c) Both A and B are correct but B is not the correct reason for A
d) Both A and B are incorrect
Answer: c
Explanation: A push-pull amplifier reduced harmonic distortion as it cancels even harmonic frequencies. Net current in load I=K(I1-I2)
Due to this, even harmonics cancel out and decreases harmonic distortion. Thus output has half-wave symmetry.

28. Why does no DC current flow in the primary winding of the output transformer of class B push-pull amplifier?
a) Because DC currents from both transistors flow in opposite directions
b) Because the net impedance is very high to allow flow of current
c) The winding only allows AC current to flow
d) Current only flows in secondary winding due to the presence of load at that side

Answer: a
Explanation: The net DC current in the primary winding of the output transformer is zero because DC collector currents of both transistors being used flow in opposite directions and hence transformer saturation doesn’t occur.

29. Which of these is incorrect for complementary symmetry push-pull amplifiers?
a) During positive cycle NPN transistor conducts
b) It is easier to fabricate on IC
c) Size of the transformer required reduces
d) Efficiency and figure of merit are same as transformer coupled push-pull amplifier
Answer: c
Explanation: The complementary symmetry push-pull amplifier uses one NPN and one PNP transistor to conduct in positive and negative cycles respectively. It does not affect efficiency or figure of merit, but since no transformer is being used, it is easier to fabricate on ICs.

30. What is the purpose of heat sink in transistor circuit?
a) Provide sufficient heat for transistor
b) Absorb excess heat from transistor
c) Keep transistor at desired temperature range
d) All of the mentioned
Answer: d
Explanation: Heat sink in a transistor circuit performs a major function of keeping temperature of transistor at a desired range and also absorbs excess heat. Self heating occurs in a transistor due to power dissipated at the collector junction. This can cause junction temperature to rise and further increases collector current, and such a process may damage the device.

31. What is the major principle behind heat sink action?
a) Avogadro’s law
b) Fourier’s law
c) Archimedes principal
d) Faraday’s law
Answer: b
Explanation: Major principle behind heat sink is Fourier’s law. Fourier’s law of heat conduction, simplified to a one-dimensional form is, when there is a temperature gradient heat will be transferred from the higher temperature region to the lower temperature region. The rate at which heat is transferred by conduction is proportional to the product of the temperature gradient and the cross-sectional area through which heat is transferred.

32. Comparing high heat objects with cooling objects which one will have slow-moving molecules?
a) High heat objects
b) Cooling objects
c) Both of them have equal molecular movement
d) Cannot be predicted
Answer: b
Explanation: Since temperature is low for cooling objects the energy of molecule will also be low.

33. If water is used as a cooling medium then it is termed as _______________
a) liquid plate
b) aqua plate
c) hot plate
d) cold plate
Answer: d
Explanation: heat sink transfers thermal energy from a high-temperature medium to a low-temperature medium like air, water etc. Usually air is used as a low-temperature medium. If water is used as medium, then it is termed as cold plate.

34. Active heat sinks are also called as ___________
a) fans
b) on sinks
c) high sinks
d) normal sinks
Answer: a
Explanation: Active heat sinks are also called as fans. Fans can be classified into ball bearing type and sleeve bearing type.

35. Passive heat sinks are made of ________________
a) Copper
b) Aluminum
c) Iron
d) Zinc
Answer: b
Explanation: The thermal conductivity of the aluminum is about 235 W/mK; it is the cheapest and lightweight metal. Aluminum heat sinks are also called as extruded heat sinks because they can be made using extrusion technique.

36. Difference between active heat sink and passive heat sink is that passive heat sink?
a) Possess mechanical components
b) Possess electrical components
c) Do not possess mechanical components
d) Do not possess metal components
Answer: c
Explanation: Unlike active heat sink passive heat sink do not possess any mechanical component and are made of aluminum finned radiator. Thus these passive heat sinks are cheaper than the active ones, and only use convection to dissipate thermal energy. They are more reliable since they have no moving parts but the performance of active sinks is better in dissipating heat.

37. Which of the following heat sink is more durable?
a) Stamped heat sink
b) Ball bearing type heat sink
c) Sleeve bearing type heat sink
d) Aluminum heat sink
Answer: d
Explanation: The more durable heat sink among this is aluminum heat sink.

38. Active heat sinks are less durable than passive heat sink because of the presents of __________
a) Complex electrical network
b) Non-metal components
c) Metal components
d) Moving components
Answer: c
Explanation: Active heat sink include moving components and hence it should be periodically serviced.

39. Aluminum heat sink is also called ___________
a) Folded-Fin heat sink
b) Bonded-Fin heat sink
c) Sleeve bearing type heat sink
d) Extrusion heat sink
Answer: d
Explanation: Aluminum heat sinks are also called as extruded heat sinks as they can be made using extrusion. Aluminum is the most common heat sink material, light in weight and costs less than Cu and other materials, and has relatively good thermal conductivity.

40.The maximum eciency produced by the
Class B amplier is
A. 50%
B. 60%
C. 79%
D. 84%
Answer:C

41.The power dissipation of Class C ampliers is
A. high
B. low
C. very high
D. very low
Answer:B

42.The h parameter conguration of the
common – emitter is
A. hie
B. hfe
C. hge
D. Both a and b
Answer:D

43.Pentavalent atoms are the atoms known as
A. accepters
B. donors
C. sacricers
D. selsh
Answers: B

44.The maximum zener impedance is denoted
by the symbol of
A. Zz
B. Zx
C. Zy
D. Z
Answers:A

1. Which transistor bias circuit provides good Q-point stability with a single-polarity supply voltage?
a) Base bias
b) Collector feedback bias
c) Voltage divider bias
d) Emitter bias
Answer: c
Explanation: When the transistor starts operating, temperature at the junction increases. Hence IC increases. As a result of which, Ie increases. Due to this increase in Ie, voltage drop across Re increases. This reduces the forward voltage across the emitter. Thus Ib reduces.

2. Ideally, for non linear operation, a transistor should be biased so that the Q-point is ________
a) near saturation
b) near cut off
c) where I_c is maximum
d) halfway between cut off and saturation
Answer: d
Explanation: If Q-point is near to saturation then positive clipping of input signal, and to cutoff then negative clipping of input signal, if IC is maximum then Q-point is in saturation region. Linear operation means output varies according to input without any distortion.

3. The most stable biasing technique used is the ____________
a) voltage-divider bias.
b) base bias
c) emitter bias
d) collector bias
Answer: a
Explanation: Voltage divider biasing is commonly used because of the main reason that the transistor under this biasing always remains in the active region.
In voltage divider biasing, the voltages at the transistor’s base, emitter and collector all depend upon the external circuit i.e. the biasing resistors R1 and R2 whose valued are fixed thus variation with beta is not present here.
However, voltage divider biasing has the advantage that its stability factor is greater than that of collector feedback biasing, that’s why it is used.

4. What is the Q-point for a fixed-bias transistor with I_B = 75 µ A , β_DC = 100, V_CC = 20 V, and R_C = 1.5 K Ohm?
a) V_C = 0 V
b) V_C =12.25V
c) V_C = 8.75 V
d) V_C = 20V
Answer: c
Explanation: V_CE=V_cc-I_C R_c (V_CE = V_C , β = I_C/I_B => I_C= β *I_B)

5. Emitter bias requires _______
a) only a positive supply voltage
b) only a negative supply voltage
c) no supply voltage
d) both positive and negative supply voltage
Answer: d
Explanation: If a dual power supply is there, then it is the most useful, and provides zero bias voltage at the emitter or collector for load. The negative supply is used to forward-bias the emitter junction through emitter resistor. The positive supply is used to reverse-bias the collector junction. Also has good stability.

6. Which transistor bias circuit arrangement has poor stability because its Q-point varies widely with β _DC?
a) base bias
b) voltage-divider bias
c) emitter bias
d) collector bias
Answer: a
Explanation: In base bias IB, RB and IC are fixed therefore it is also called fixed bias transistor. When the temperature is vary then the Q point is also varied. Therefore base bias has no stabilization.

7. What is the most common bias circuit?
a) Base
b) Collector
c) Emitter
d) Voltage-divider
Answer: d
Explanation: Due to the best stabilization, voltage divider circuit is commonly used. Under this biasing technique, the transistor always remains in the active region. In voltage divider biasing, the voltages at the transistor’s base, emitter and collector all depend upon the external circuit i.e. the biasing resistors R1 and R2 whose valued are fixed thus variation with beta is not present here.

8. Voltage-divider bias has a relatively stable Q-point, as does_________
a) base bias
b) collector-feedback bias
c) emitter bias
d) both base and emitter bias
Answer: b
Explanation: The collector feedback biasing is also beta-independent. It has the same circuit as the voltage divider biasing except there is only one resistor used other than load resistor Rc. However, voltage divider biasing has the advantage that its stability factor is greater than that of collector feedback biasing.

9. The linear (active) operating region of a transistor lies along the load line below ________ and above ___________
a) cut off, saturation
b) saturation, cut off
c) active, saturation
d) cut off, active
Answer: b
Explanation: Q-point is generally taken to be the intersection point of load line with the output characteristics of the transistor. That’s why; the linear operating region of a transistor must lie along the load line below saturation and above the cut off.

10. The input resistance of the base of a voltage-divider biased transistor can be neglected _________
a) at all times
b) only if the base current is much smaller than the current through R2 (the lower bias resistor)
c) at no time
d) only if the base current is much larger than the current through R2 (the lower bias resistor
Answer: b
Explanation: The input resistance can be neglected if the values of R1 and R2 are very large. Therefore the base current becomes very small.

11. The difference output of the basic differential amplifier is taken at ___________
a) At X and ground
b) At Y and ground
c) Difference of the voltages at the gates of M1 and M2
d) Difference of the voltages between X and Y
Answer: d
Explanation: None.

12. The Differential output of the difference amplifier is the amplification of __________
a) Difference between the voltages of input signals
b) Difference between the output of the each transistor
c) Difference between the supply and the output of the each transistor
d) All of the mentioned
Answer: a
Explanation: None.

13. The inputs to the differential amplifier are applied at __________
a) At X and Y
b) At the gates of M1 and M2
c) All of the mentioned
d) None of the mentioned
Answer: b
Explanation: None.

14. The Maximum and minimum output of the Differential amplifiers is defined as:
a) Vmax = VDD, Vmin = -VDD
b) Vmax = VDD, Vmin = Rd.Iss
c) Vmax = VDD, Vmin = VDD – Rd.Iss
d) None of the mentioned
Answer: c
Explanation: None.

15. In Common Mode Differential Amplifier, the outputs Vout1 and Vout2 are related as:
a) Vout2 is in out of phase with Vout1 with same amplitude
b) Vout2 and Vout1 have same amplitude but the phase difference is 90 degrees
c) Vout1 and Vout2 have same amplitude and are in phase with each other and their respective inputs
d) Vout1 and Vout2 have same amplitude and are in phase with each other but out of phase with their respective inputs
Answer: d
Explanation: None.

16. In a small signal differential gain vs input CM level graph, the gain decreases after V2 due to:
a) As the input voltage increases, the output will be clipped
b) When the input voltage to the transistors are high, the transistor enters saturation region and increases the current, which inturn decreases the output voltage = VDD – Rd.Iss
c) When Common Mode voltage is greater than or equal to V2, the input transistors enter triode region, the gain begins to fall
d) Increasing the input voltage beyond V2 causes the gate oxide to conduct and the gain is reduced
Answer: c
Explanation: None.

17. For the difference amplifier which of the following is true?
a) It responds to the difference between the two signals and rejects the signal that are common to both the signal
b) It responds to the signal that are common to the two inputs only
c) It has a low value of input resistance
d) The efficacy of the amplifier is measured by the degree of its differential signal to the preference of the common mode signal
Answer: a
Explanation: All the statements are not true except for the fact that it responds only when there is difference between two signals only.

18. If for an amplifier the common mode input signal is v_c, the differential signal id v_d and A_c and A_d represent common mode gain and differential gain respectively, then the output voltage v₀ is given by
a) v₀ = A_d v_d – A_c v_c
b) v₀ = – A_d v_d + A_c v_c
c) v₀ = A_d v_d + A_c v_c
d) v₀ = – A_d v_d – A_c v_c
Answer: c
Explanation: It is a standard mathematical expression.

19. If for an amplifier v₁ and v₂ are the input signals, v_c and v_d represent the common mode and differential signals respectively, then the expression for CMRR (Common Mode Rejection Ratio) is
a) 20 log (|A_d| / |A_c|)
b) -10 log (|A_c| / |Ad|)²
c) 20 log (v₂ – v₁ / 0.5(v₂ + v₁))
d) All of the mentioned
Answer: d
Explanation: Note that all the expressions are identical.

20. The problem with the single operational difference amplifier is its
a) High input resistance
b) Low input resistance
c) Low output resistance
d) None of the mentioned
Answer: b
Explanation: Due to low input resistance a large part of the signal is lost to the source’s internal resistance.

21. For the difference amplifier as shown in the figure show that if each resistor has a tolerance of ±100 ε % (i.e., for, say, a 5% resistor, ε = 0.05) then the worst-case CMRR is given approximately by (given K = R₂/R₁ = R₄/R₃)

a) 20 log [K+1/4ε].
b) 20 log [K+1/2ε].
c) 20 log [K+1/ε].
d) 20 log [2K+2/ε].
Answer: a
Explanation: None.

22. For the circuit given below determine the input common mode resistance.

a) (R₁ + R₃) || (R₂) || + (R₄)
b) (R₁ + R₄) || (R₂ + R₃)
c) (R₁ + R₂) || (R3 + R₄)
d) (R₁ + R₃) || (R₂ + R₄)
Answer: c
Explanation: Parallel combination of series combination of R₁ & R₃ with the series combination of R₃ and R₄ is the required answer as is visible by the circuit.

23. For the circuit shown below express v₀ as a function of v₁ and v₂.

a) v₀ = v₁ + v₂
b) v₀ = v₂ – v₁
c) v₀ = v₁ – v₂
d) v₀ = -v₁ – v₂

Answer: b
Explanation: Considering the fact that the potential at the input terminals are identical and proceeding we obtain the given result.

24. For the difference amplifier shown below, let all the resistors be 10kΩ ± x%. The expression for the worst-case common-mode gain is

a) x / 50
b) x / 100
c) 2x / (100 – x)
d) 2x / (100 + x)
Answer: d
Explanation: None.

25. Determine A_d and A_c for the given circuit.

a) A_c = 0 and A_d = 1
b) A_c ≠ 0 and A_d = 1
c) A_c = 0 and A_d ≠ 1
d) A_c ≠ 0 and A_d ≠
Answer: a
Explanation: Consider the fact that the potential at the input terminals are identical and obtain the values of V₁ and V₂. Thus obtain the value of V_d and V_c.

26. Determine the voltage gain for the given circuit known that R₁ = R₃ = 10kΩ abd R₂ = R₄ = 100kΩ.

a) 1
b) 10
c) 100
d) 1000
Answer: b
Explanation: Voltage gain is 100/10.