[MCQ’s]Discrete Time Signal processing

Module 04

1. The quantization inherent in the finite precision arithmetic operations render the system linear.
a) True
b) False
Explanation: In the realization of a digital filter, either in digital hardware or in software on a digital computer, the quantization inherent in the finite precision arithmetic operations render the system linear.

2. In recursive systems, which of the following is caused because of the nonlinearities due to the finite-precision arithmetic operations?
a) Periodic oscillations in the input
b) Non-Periodic oscillations in the input
c) Non-Periodic oscillations in the output
d) Periodic oscillations in the output
Explanation: In the recursive systems, the nonlinearities due to the finite-precision arithmetic operations often cause periodic oscillations to occur in the output even when the input sequence is zero or some non zero constant value.

3. The oscillations in the output of the recursive system are called as ‘limit cycles’.
a) True
b) False
Explanation: In the recursive systems, the nonlinearities due to the finite-precision arithmetic operations often cause periodic oscillations to occur in the output even when the input sequence is zero or some non zero constant value. The oscillations thus produced in the output are known as ‘limit cycles’.

4. Limit cycles in the recursive are directly attributable to which of the following?
a) Round-off errors in multiplication
c) Both of the mentioned
d) None of the mentioned
Explanation: The oscillations in the output of the recursive system are called as limit cycles and are directly attributable to round-off errors in multiplication and overflow errors in addition.

5. What is the range of values called as to which the amplitudes of the output during a limit cycle ae confined to?
a) Stop band
b) Pass band
c) Live band
Explanation: The amplitudes of the output during a limit circle are confined to a range of values that is called the ‘dead band’ of the filter.

6. Zero input limit cycles occur from non-zero initial conditions with the input x(n)=0.
a) True
b) False
Explanation: When the input sequence x(n) to the filter becomes zero, the output of the filter then, after a number of iterations, enters into the limit cycle. The output remains in the limit cycle until another input of sufficient size is applied that drives the system out of the limit cycle. Similarly, zero input limit cycles occur from non-zero initial conditions with the input x(n)=0.

7. Which of the following is true when the response of the single pole filter is in the limit cycle?
a) Actual non-linear system acts as an equivalent non-linear system
b) Actual non-linear system acts as an equivalent linear system
c) Actual linear system acts as an equivalent non-linear system
d) Actual linear system acts as an equivalent linear system
Explanation: We note that when the response of the single pole filter is in the limit cycle, the actual non-linear system acts as an equivalent linear system with a pole at z=1 when the pole is positive and z=-1 when the poles is negative.

8. The limit cycle mode with zero input, which occurs as a result of rounding the multiplications, corresponds to an equivalent second order system with poles at z=±1.
a) True
b) False
Explanation: There is an possible limit cycle mode with zero input, which occurs as a result of rounding the multiplications, corresponds to an equivalent second order system with poles at z=±1. In this case the two pole filter exhibits oscillations with an amplitude that falls in the dead band bounded by 2-b/(1-|a1|-a2).

9. What is the necessary and sufficient condition for a second order filter that no zero-input overflow limit cycles occur?
a) |a1|+|a2|=1
b) |a1|+|a2|>1
c) |a1|+|a2|<1
d) None of the mentioned
Explanation: It can be easily shown that a necessary and sufficient condition for ensuring that no zero-input overflow limit cycles occur is |a1|+|a2|<1
which is extremely restrictive and hence an unreasonable constraint to impose on any second order section.

10. An effective remedy for curing the problem of overflow oscillations is to modify the adder characteristic.
a) True
b) False
Explanation: An effective remedy for curing the problem of overflow oscillations is to modify the adder characteristic, so that it performs saturation arithmetic. Thus when an overflow is sensed, the output of the adder will be the full scale value of ±1.

11. The basic task of the A/D converter is to convert a discrete set of digital code words into a continuous range of input amplitudes.
a) True
b) False
Explanation: The basic task of the A/D converter is to convert a continuous range of input amplitude into a discrete set of digital code words. This conversion involves the processes of Quantization and Coding.

12. What is the type of quantizer, if a Zero is assigned a quantization level?
a) Midrise type
c) Mistreat type
d) None of the mentioned
Explanation: If a zero is assigned a quantization level, the quantizer is of the mid treat type.

13. What is the type of quantizer, if a Zero is assigned a decision level?
a) Midrise type
c) Mistreat type
d) None of the mentioned
Explanation: If a zero is assigned a decision level, the quantizer is of the midrise type.

14. What is the term used to describe the range of an A/D converter for bipolar signals?
a) Full scale
b) FSR
c) Full-scale region
d) FS
Explanation: The term Full-scale range (FSR) is used to describe the range of an A/D converter for bipolar signals (i.e., signals with both positive and negative amplitudes).

15. What is the term used to describe the range of an A/D converter for uni-polar signals?
a) Full scale
b) FSR
c) Full-scale region
d) FSS
Explanation: The term Full scale (FS) is used for uni-polar signals.

16. If the dynamic range of the signal is smaller than the range of quantizer, the samples that exceed the quantizer are clipped, resulting in large quantization error.
a) True
b) False
Explanation: If the dynamic range of the signal, defined as xmax-xmin, is larger than the range of the quantizer, the samples that exceed the quantizer range are clipped, resulting in a large (greater than Δ2) quantization error.

17. What is the step size or the resolution of an A/D converter?
a) Δ = (R)/2(b+1)
b) Δ = (R)/2(b-1)
c) Δ = (R)/3(b+1)
d) Δ = (R)/2
Explanation: The coding process in an A/D converter assigns a unique binary number to each quantization level. If we have L levels, we need at least L different binary numbers. With a word length of b + 1 bits we can represent 2b+1 distinct binary numbers. Hence we should have 2(b+1) > L or, equivalently, b + 1 > log2 L. Then the step size or the resolution of the A/D converter is given by
Δ = (R)/2(b+1), where R is the range of the quantizer.

18. In the practical A/D converters, if the first transition may not occur at exactly + 1/2 LSB, then such kind of error is known as ____________
a) Scale-factor error
b) Offset error
c) Linearity error
d) All of the mentioned
Explanation: We note that practical A/D converters may have offset error (the first transition may not occur at exactly + 1/2 LSB).

19. In the practical A/D converters, if the difference between the values at which the first transition and the last transition occur is not equal to FS – 2LSB, then such error is known as _________
a) Scale-factor error
b) Offset error
c) Linearity error
d) All of the mentioned
Explanation: We note that practical A/D converters scale-factor (or gain) error (the difference between the values at which the first transition and the last transition occur is not equal to FS — 2LSB).

20. In the practical A/D converters, if the differences between transition values are not all equal or uniformly changing, then such error is known as?
a) Scale-factor error
b) Offset error
c) Linearity error
d) All of the mentioned
Explanation: We note that practical A/D converters, linearity error (the differences between transition values are not all equal or uniformly changing).

21. The effect of round off errors due to the multiplications performed in the DFT with fixed point arithmetic is known as Quantization error.
a) True
b) False
Explanation: Since DFT plays a very important role in many applications of DSP, it is very important for us to know the effect of quantization errors in its computation. In particular, we shall consider the effect of round off errors due to the multiplications performed in the DFT with fixed point arithmetic.

22. What is the model that has been adopt for characterizing round of errors in multiplication?
a) Multiplicative white noise model
b) Subtractive white noise model
d) None of the mentioned
Explanation: Additive white noise model is the model that we use in the statistical analysis of round off errors in IIR and FIR filters.

23. How many quantization errors are present in one complex valued multiplication?
a) One
b) Two
c) Three
d) Four
Explanation: We assume that the real and imaginary components of {x(n)} and {WNkn} are represented by ‘b’ bits. Consequently, the computation of product x(n). WNkn requires four real multiplications. Each real multiplication is rounded from 2b bits to b bits and hence there are four quantization errors for each complex valued multiplication.

24. What is the total number of quantization errors in the computation of single point DFT of a sequence of length N?
a) 2N
b) 4N
c) 8N
d) 12N
Explanation: Since the computation of single point DFT of a sequence of length N involves N number of complex multiplications, it contains 4N number of quantization errors.

25. What is the range in which the quantization errors due to rounding off are uniformly distributed as random variables if Δ=2-b?
a) (0,Δ)
b) (-Δ,0)
c) (-Δ/2,Δ/2)
d) None of the mentioned
Explanation: The Quantization errors due to rounding off are uniformly distributed random variables in the range (-Δ/2,Δ/2) if Δ=2-b. This is one of the assumption that is made about the statistical properties of the quantization error.

26. The 4N quantization errors are mutually uncorrelated.
a) True
b) False
Explanation: The 4N quantization errors are mutually uncorrelated. This is one of the assumption that is made about the statistical properties of the quantization error.

27. The 4N quantization errors are correlated with the sequence {x(n)}.
a) True
b) False
Explanation: According to one of the assumption that is made about the statistical properties of the quantization error, the 4N quantization errors are uncorrelated with the sequence {x(n)}.

28. How is the variance of the quantization error related to the size of the DFT?
a) Equal
b) Inversely proportional
c) Square proportional
d) Proportional
Explanation: We know that each of the quantization has a variance of Δ2/12=2-2b/12.
The variance of the quantization errors from the 4N multiplications is 4N. 2-2b/12=2-2b(N/3).
Thus the variance of the quantization error is directly proportional to the size of the DFT.

29. Every fourfold increase in the size N of the DFT requires an additional bit in computational precision to offset the additional quantization errors.
a) True
b) False
Explanation: We know that, the variance of the quantization errors is directly proportional to the size N of the DFT. So, every fourfold increase in the size N of the DFT requires an additional bit in computational precision to offset the additional quantization errors.

30. What is the signal-to-noise ratio?
a) σX2q2
b) σX2q2
c) σX2q2
d) σX2q2
Explanation: The signal-to-noise ratio of a signal, SNR is given by the ratio of the variance of the output DFT coefficients to the variance of the quantization errors.

31. How many number of bits are required to compute the DFT of a 1024 point sequence with a SNR of 30db?
a) 15
b) 10
c) 5
d) 20
Explanation: The size of the sequence is N=210. Hence the SNR is
10log10(σX22/σq2)=10 log1022b-20
For an SNR of 30db, we have
3(2b-20)=30=>b=15 bits.
Note that 15 bits is the precision for both addition and multiplication.

32. How many number of butterflies are required per output point in FFT algorithm?
a) N
b) N+1
c) 2N
d) N-1
Explanation: We find that, in general, there are N/2 in the first stage of FFT, N/4 in the second stage, N?8 in the third state, and so on, until the last stage where there is only one. Consequently, the number of butterflies per output point is N-1.

33. What is the value of the variance of quantization error in FFT algorithm, compared to that of direct computation?
a) Greater
b) Less
c) Equal
d) Cannot be compared
Explanation: If we assume that the quantization errors in each butterfly are uncorrelated with the errors in the other butterflies, then there are 4(N-1) errors that affect the output of each point of the FFT. Consequently, the variance of the quantization error due to FFT algorithm is given by
4(N-1)(Δ2/12)=N(Δ2/3)(approximately)
Thus, the variance of quantization error due to FFT algorithm is equal to the variance of the quantization error due to direct computation.

34. How many number of bits are required to compute the FFT of a 1024 point sequence with a SNR of 30db?
a) 11
b) 10
c) 5
d) 20
Explanation: The size of the FFT is N=210. Hence the SNR is 10 log1022b-v-1=30
=>3(2b-11)=30
=>b=21/2=11 bits.

Module 05

1) How are the instructions executed in DSP Processors?
a.In Parallel manner
b.In Sequential manner
c.Both a and b
d.None of the above

2)In TMS 320 C5X processor, which memory segment provides interfacing to external memory mapped peripherals and also serves as extra data storage space?
a. Program Memory
b.Data memory
c.I/O Memory
d.All of the above

3)In TMS 320 C5X processor, which operation/s is/are performed by Compare Select & Store Unit (CSSU)?
a.Selection of large word in accumulator for storing into the data memory
b.Comparison between high & low word of accumulator
c.Maintain the record of transition histories
d.All of the above

4)In ADSP 21 xx architecture, how many previously executed instructions are stored in instruction cache of cache memory?
4
8
16
32

5) Match the following STKY multiplier (MAC) flag notations with their meanings in ADSP 21 xx family architecture.
MOS —————— 1) Multiplier floating-point invalid operation
MIS  ——————- 2) Multiplier Underflow
MUS —————— 3) Multiplier floating-point overflow
MVS —————— 4) Multiplier fixed-point overflow
A-3, B-2, C-4, D-1
A-2, B-3, C-1, D-4
A-1, B-4, C-3, D-2
A-4, B-1, C-2, D-3

6)In ADSP 21xx architecture, which notation represents ALU overflow condition?
a.AC
b.AV
c.NE
d.EQ

7)In CPU structure, what kind of instruction to be executed is held by an instruction Register (IR)?
a.Current (present)
b.Previous
c.Next
d.All of the above

8)In CPU structure, which register provides the address for fetching of data or instruction especially by means of processor?
a.Data Register
b.Instruction Register
c.Accumulator

9)In CPU structure, where is one of the operand provided by an accumulator in order to store the result?
a.Control Unit
b.Arithmetic Logic Unit
c.Memory Unit
d.Output Unit